str7x: improve error handling
clean up error handling a bit. No change in behavior. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
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ca0f6a5c58
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0d8f60e28f
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@ -5,6 +5,9 @@
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* Copyright (C) 2008 by Spencer Oliver *
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* spen@spen-soft.co.uk *
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* *
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* *
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* Copyright (C) 2010 Øyvind Harboe *
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* oyvind.harboe@zylin.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* the Free Software Foundation; either version 2 of the License, or *
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@ -162,22 +165,88 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command)
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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static uint32_t str7x_status(struct flash_bank *bank)
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/* wait for flash to become idle or report errors.
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FIX!!! what's the maximum timeout??? The documentation doesn't
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state any maximum time.... by inspection it seems > 1000ms is to be
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expected.
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10000ms is long enough that it should cover anything, yet not
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quite be equivalent to an infinite loop.
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*/
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static int str7x_waitbusy(struct flash_bank *bank)
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{
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{
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int err;
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int i;
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struct target *target = bank->target;
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struct target *target = bank->target;
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struct str7x_flash_bank *str7x_info = bank->driver_priv;
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for (i = 0 ; i < 10000; i++)
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{
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uint32_t retval;
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uint32_t retval;
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err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
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if (err != ERROR_OK)
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return err;
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target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
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if ((retval & str7x_info->busy_bits) == 0)
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return ERROR_OK;
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return retval;
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alive_sleep(1);
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}
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LOG_ERROR("Timed out waiting for str7x flash");
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return ERROR_FAIL;
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}
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}
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static uint32_t str7x_result(struct flash_bank *bank)
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static int str7x_result(struct flash_bank *bank)
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{
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{
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struct target *target = bank->target;
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struct target *target = bank->target;
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uint32_t retval;
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uint32_t retval;
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target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval);
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int err;
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err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval);
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if (err != ERROR_OK)
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return err;
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if (retval & FLASH_WPF)
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{
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LOG_ERROR("str7x hw write protection set");
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err = ERROR_FAIL;
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}
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if (retval & FLASH_RESER)
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{
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LOG_ERROR("str7x suspended program erase not resumed");
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err = ERROR_FAIL;
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}
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if (retval & FLASH_10ER)
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{
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LOG_ERROR("str7x trying to set bit to 1 when it is already 0");
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err = ERROR_FAIL;
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}
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if (retval & FLASH_PGER)
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{
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LOG_ERROR("str7x program error");
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err = ERROR_FAIL;
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}
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if (retval & FLASH_ERER)
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{
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LOG_ERROR("str7x erase error");
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err = ERROR_FAIL;
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}
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if (err == ERROR_OK)
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{
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if (retval & FLASH_ERR)
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{
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/* this should always be set if one of the others are set... */
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LOG_ERROR("str7x write operation failed / bad setup");
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err = ERROR_FAIL;
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}
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}
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if (err != ERROR_OK)
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{
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LOG_ERROR("FLASH_ER register contents: 0x%" PRIx32, retval);
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}
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return retval;
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return retval;
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}
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}
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@ -216,8 +285,8 @@ static int str7x_erase(struct flash_bank *bank, int first, int last)
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int i;
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int i;
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uint32_t cmd;
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uint32_t cmd;
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uint32_t retval;
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uint32_t sectors = 0;
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uint32_t sectors = 0;
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int err;
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if (bank->target->state != TARGET_HALTED)
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if (bank->target->state != TARGET_HALTED)
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{
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{
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@ -233,28 +302,32 @@ static int str7x_erase(struct flash_bank *bank, int first, int last)
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LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors);
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LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors);
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/* clear FLASH_ER register */
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/* clear FLASH_ER register */
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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if (err != ERROR_OK)
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return err;
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cmd = FLASH_SER;
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cmd = FLASH_SER;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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if (err != ERROR_OK)
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return err;
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cmd = sectors;
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cmd = sectors;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
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if (err != ERROR_OK)
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return err;
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cmd = FLASH_SER | FLASH_WMS;
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cmd = FLASH_SER | FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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if (err != ERROR_OK)
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return err;
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) {
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err = str7x_waitbusy(bank);
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alive_sleep(1);
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if (err != ERROR_OK)
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}
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return err;
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retval = str7x_result(bank);
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err = str7x_result(bank);
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if (err != ERROR_OK)
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if (retval)
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return err;
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{
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LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%" PRIx32 "", retval);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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for (i = first; i <= last; i++)
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for (i = first; i <= last; i++)
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bank->sectors[i].is_erased = 1;
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bank->sectors[i].is_erased = 1;
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@ -268,7 +341,6 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last)
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struct target *target = bank->target;
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struct target *target = bank->target;
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int i;
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int i;
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uint32_t cmd;
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uint32_t cmd;
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uint32_t retval;
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uint32_t protect_blocks;
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uint32_t protect_blocks;
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if (bank->target->state != TARGET_HALTED)
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if (bank->target->state != TARGET_HALTED)
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@ -286,37 +358,43 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last)
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}
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}
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/* clear FLASH_ER register */
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/* clear FLASH_ER register */
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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int err;
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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if (err != ERROR_OK)
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return err;
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cmd = FLASH_SPR;
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cmd = FLASH_SPR;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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if (err != ERROR_OK)
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return err;
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cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR);
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cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR);
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd);
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if (err != ERROR_OK)
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return err;
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cmd = protect_blocks;
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cmd = protect_blocks;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd);
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if (err != ERROR_OK)
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return err;
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cmd = FLASH_SPR | FLASH_WMS;
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cmd = FLASH_SPR | FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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if (err != ERROR_OK)
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return err;
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) {
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err = str7x_waitbusy(bank);
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alive_sleep(1);
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if (err != ERROR_OK)
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}
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return err;
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retval = str7x_result(bank);
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err = str7x_result(bank);
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if (err != ERROR_OK)
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LOG_DEBUG("retval: 0x%8.8" PRIx32 "", retval);
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return err;
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if (retval & FLASH_ERER)
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return ERROR_FLASH_SECTOR_NOT_ERASED;
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else if (retval & FLASH_WPF)
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return ERROR_FLASH_OPERATION_FAILED;
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer,
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int str7x_write_block(struct flash_bank *bank, uint8_t *buffer,
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uint32_t offset, uint32_t count)
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uint32_t offset, uint32_t count)
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{
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{
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struct str7x_flash_bank *str7x_info = bank->driver_priv;
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struct str7x_flash_bank *str7x_info = bank->driver_priv;
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@ -409,14 +487,12 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer,
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str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4),
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str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4),
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10000, &armv4_5_info)) != ERROR_OK)
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10000, &armv4_5_info)) != ERROR_OK)
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{
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{
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LOG_ERROR("error executing str7x flash write algorithm");
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retval = ERROR_FLASH_OPERATION_FAILED;
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break;
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break;
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}
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}
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if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00)
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if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00)
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{
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{
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retval = ERROR_FLASH_OPERATION_FAILED;
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retval = str7x_result(bank);
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break;
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break;
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}
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}
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@ -442,7 +518,6 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer,
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uint32_t offset, uint32_t count)
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uint32_t offset, uint32_t count)
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{
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{
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struct target *target = bank->target;
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struct target *target = bank->target;
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struct str7x_flash_bank *str7x_info = bank->driver_priv;
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uint32_t dwords_remaining = (count / 8);
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uint32_t dwords_remaining = (count / 8);
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uint32_t bytes_remaining = (count & 0x00000007);
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uint32_t bytes_remaining = (count & 0x00000007);
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uint32_t address = bank->base + offset;
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uint32_t address = bank->base + offset;
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@ -498,16 +573,7 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer,
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/* if block write failed (no sufficient working area),
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/* if block write failed (no sufficient working area),
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* we use normal (slow) single dword accesses */
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* we use normal (slow) single dword accesses */
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LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
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LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
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}
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} else
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else if (retval == ERROR_FLASH_OPERATION_FAILED)
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{
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/* if an error occured, we examine the reason, and quit */
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retval = str7x_result(bank);
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LOG_ERROR("flash writing failed with error code: 0x%x", retval);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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else
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{
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{
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return retval;
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return retval;
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}
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}
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@ -543,17 +609,14 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer,
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cmd = FLASH_DWPG | FLASH_WMS;
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cmd = FLASH_DWPG | FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
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int err;
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{
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err = str7x_waitbusy(bank);
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alive_sleep(1);
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if (err != ERROR_OK)
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}
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return err;
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retval = str7x_result(bank);
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err = str7x_result(bank);
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if (err != ERROR_OK)
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if (retval & FLASH_PGER)
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return err;
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return ERROR_FLASH_OPERATION_FAILED;
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else if (retval & FLASH_WPF)
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return ERROR_FLASH_OPERATION_FAILED;
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dwords_remaining--;
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dwords_remaining--;
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address += 8;
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address += 8;
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@ -592,17 +655,14 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer,
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cmd = FLASH_DWPG | FLASH_WMS;
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cmd = FLASH_DWPG | FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
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int err;
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{
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err = str7x_waitbusy(bank);
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alive_sleep(1);
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if (err != ERROR_OK)
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}
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return err;
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retval = str7x_result(bank);
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err = str7x_result(bank);
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if (err != ERROR_OK)
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if (retval & FLASH_PGER)
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return err;
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return ERROR_FLASH_OPERATION_FAILED;
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else if (retval & FLASH_WPF)
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return ERROR_FLASH_OPERATION_FAILED;
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}
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}
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return ERROR_OK;
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return ERROR_OK;
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