interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

gaffe in previous commit fixed. "reset run" now works again for arm7/9 

git-svn-id: svn://svn.berlios.de/openocd/trunk@891 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2008-08-05 14:38:10 +00:00
parent f370d70670
commit 0ca1eb2804
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/target/arm7_9_common.c
View File

@ -833,7 +833,7 @@ int arm7_9_deassert_reset(target_t *target)
/* deassert reset lines */
jtag_add_reset(0, 0);
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)!=0)
if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST)!=0)
{
LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
/* set up embedded ice registers again */