dsp563xx: add x, y and p memory access
Hello, this patch add commands to access to x,y and p memory. For run time optimization some local jtag function was changed to static inline. Regards, Mathias
This commit is contained in:
Mathias K
Øyvind Harboe
parent
d51b561b10
commit
08bf273def
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@ -201,6 +201,7 @@ static const struct
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};
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#define REG_NUM_R0 0
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#define REG_NUM_R1 1
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#define REG_NUM_N0 8
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#define REG_NUM_N1 9
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#define REG_NUM_M0 16
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@ -221,6 +222,13 @@ static const struct
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#define REG_NUM_AAR2 52
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#define REG_NUM_AAR3 53
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enum memory_type
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{
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MEM_X = 0,
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MEM_Y = 1,
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MEM_P = 2,
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};
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#define INSTR_JUMP 0x0AF080
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/* Effective Addressing Mode Encoding */
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#define EAME_R0 0x10
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@ -359,11 +367,11 @@ static int dsp563xx_reg_read_high_io(struct target *target, uint32_t instr_mask,
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dsp563xx->read_core_reg(target, REG_NUM_R0);
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/* move source memory to r0 */
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instr = INSTR_MOVEP_REG_HIO(0, 0, EAME_R0, instr_mask);
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 0, EAME_R0, instr_mask);
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, instr)) != ERROR_OK)
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return err;
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/* move r0 to debug register */
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instr = INSTR_MOVEP_REG_HIO(0, 1, EAME_R0, 0xfffffc);
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, EAME_R0, 0xfffffc);
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, instr)) != ERROR_OK)
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return err;
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/* read debug register */
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@ -389,7 +397,7 @@ static int dsp563xx_reg_write_high_io(struct target *target, uint32_t instr_mask
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x60F400, data)) != ERROR_OK)
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return err;
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/* move r0 to destination memory */
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instr = INSTR_MOVEP_REG_HIO(0, 1, EAME_R0, instr_mask);
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, EAME_R0, instr_mask);
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, instr)) != ERROR_OK)
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return err;
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@ -404,7 +412,7 @@ static int dsp563xx_reg_read(struct target *target, uint32_t eame, uint32_t * da
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int err;
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uint32_t instr;
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instr = INSTR_MOVEP_REG_HIO(0, 1, eame, 0xfffffc);
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, eame, 0xfffffc);
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, instr)) != ERROR_OK)
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return err;
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/* nop */
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@ -1114,33 +1122,12 @@ static int dsp563xx_soft_reset_halt(struct target *target)
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return ERROR_OK;
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}
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/*
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* 000000 nop
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* 46F400 AABBCC move #$aabbcc,y0
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* 60F400 AABBCC move #$aabbcc,r0
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* 467000 AABBCC move y0,x:AABBCC
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* 607000 AABBCC move r0,x:AABBCC
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* 46E000 move x:(r0),y0
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* 4EE000 move y:(r0),y0
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* 07E086 move p:(r0),y0
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* 0450B9 move sr,r0
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* 0446BA move omr,y0
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* 0446BC move ssh,y0
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* 0446BD move ssl,y0
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* 0446BE move la,y0
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* 0446BF move lc,y0
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*
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* 61F000 AABBCC move x:AABBCC,r1
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* 076190 movem r0,p:(r1)
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*
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*/
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static int dsp563xx_read_memory_p(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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static int dsp563xx_read_memory(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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{
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int err;
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struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
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uint32_t i, x;
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uint32_t data;
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uint32_t data, move_cmd;
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uint8_t *b;
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LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count);
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@ -1151,41 +1138,68 @@ static int dsp563xx_read_memory_p(struct target *target, uint32_t address, uint3
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return ERROR_TARGET_NOT_HALTED;
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}
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switch (mem_type)
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{
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case MEM_X:
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move_cmd = 0x61d800;
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break;
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case MEM_Y:
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move_cmd = 0x69d800;
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break;
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case MEM_P:
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move_cmd = 0x07d891;
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break;
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default:
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return ERROR_INVALID_ARGUMENTS;
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}
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/* we use r0 to store temporary data */
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if (!dsp563xx->core_cache->reg_list[REG_NUM_R0].valid)
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dsp563xx->read_core_reg(target, REG_NUM_R0);
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/* we use r1 to store temporary data */
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if (!dsp563xx->core_cache->reg_list[REG_NUM_R1].valid)
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dsp563xx->read_core_reg(target, REG_NUM_R1);
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/* r0 is no longer valid on target */
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dsp563xx->core_cache->reg_list[REG_NUM_R0].dirty = 1;
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/* r1 is no longer valid on target */
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dsp563xx->core_cache->reg_list[REG_NUM_R1].dirty = 1;
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x = count;
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b = buffer;
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0x60F400, address)) != ERROR_OK)
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return err;
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for (i = 0; i < x; i++)
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{
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x60F400, address + i)) != ERROR_OK)
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data = 0;
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, move_cmd)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, 0x07E086)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0x08D13C)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x467000, 0xfffffc)) != ERROR_OK)
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return err;
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if ((err = jtag_execute_queue()) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OGDBR, &data)) != ERROR_OK)
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return err;
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target_buffer_set_u32(target, b, data);
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b += 4;
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b = buffer + 4 * i;
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if (size > 0)
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*b++ = data >> 0;
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if (size > 1)
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*b++ = data >> 8;
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if (size > 2)
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*b++ = data >> 16;
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if (size > 3)
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*b++ = 0x00;
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LOG_DEBUG("R: %08X", data);
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}
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return ERROR_OK;
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}
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static int dsp563xx_write_memory_p(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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static int dsp563xx_read_memory_p(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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{
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return dsp563xx_read_memory(target, MEM_P, address, size, count, buffer);
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}
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static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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{
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int err;
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struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
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uint32_t i, x;
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uint32_t data;
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uint32_t data, move_cmd;
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uint8_t *b;
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LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
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@ -1196,37 +1210,260 @@ static int dsp563xx_write_memory_p(struct target *target, uint32_t address, uint
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return ERROR_TARGET_NOT_HALTED;
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}
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switch (mem_type)
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{
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case MEM_X:
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move_cmd = 0x615800;
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break;
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case MEM_Y:
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move_cmd = 0x695800;
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break;
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case MEM_P:
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move_cmd = 0x075891;
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break;
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default:
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return ERROR_INVALID_ARGUMENTS;
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}
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/* we use r0 to store temporary data */
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if (!dsp563xx->core_cache->reg_list[REG_NUM_R0].valid)
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dsp563xx->read_core_reg(target, REG_NUM_R0);
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/* we use r1 to store temporary data */
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if (!dsp563xx->core_cache->reg_list[REG_NUM_R1].valid)
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dsp563xx->read_core_reg(target, REG_NUM_R1);
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/* r0 is no longer valid on target */
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dsp563xx->core_cache->reg_list[REG_NUM_R0].dirty = 1;
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/* r1 is no longer valid on target */
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dsp563xx->core_cache->reg_list[REG_NUM_R1].dirty = 1;
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x = count;
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b = buffer;
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0x60F400, address)) != ERROR_OK)
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return err;
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for (i = 0; i < x; i++)
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{
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b = buffer + 4 * i;
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data = target_buffer_get_u32(target, b);
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data &= 0x00ffffff;
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data = 0;
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if (size > 0)
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data = *buffer++;
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if (size > 1)
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data |= (*buffer++) << 8;
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if (size > 2)
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data |= (*buffer++) << 16;
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if (size > 3)
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data |= (*buffer++) << 24;
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LOG_DEBUG("W: %08X", data);
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// LOG_DEBUG("%08X", data);
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x61F400, data)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, move_cmd)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x61F400, address + i)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x60F400, data)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, 0x076190)) != ERROR_OK)
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return err;
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if ((err = jtag_execute_queue()) != ERROR_OK)
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return err;
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b += 4;
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}
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return ERROR_OK;
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}
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static int dsp563xx_write_memory_p(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
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{
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return dsp563xx_write_memory(target, MEM_P, address, size, count, buffer);
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}
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static void handle_md_output(struct command_context *cmd_ctx, struct target *target, uint32_t address, unsigned size, unsigned count, const uint8_t * buffer)
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{
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const unsigned line_bytecnt = 32;
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unsigned line_modulo = line_bytecnt / size;
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char output[line_bytecnt * 4 + 1];
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unsigned output_len = 0;
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const char *value_fmt;
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switch (size)
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{
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case 4:
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value_fmt = "%8.8x ";
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break;
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case 2:
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value_fmt = "%4.4x ";
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break;
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case 1:
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value_fmt = "%2.2x ";
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break;
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default:
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/* "can't happen", caller checked */
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LOG_ERROR("invalid memory read size: %u", size);
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return;
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}
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for (unsigned i = 0; i < count; i++)
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{
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if (i % line_modulo == 0)
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{
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output_len += snprintf(output + output_len, sizeof(output) - output_len, "0x%8.8x: ", (unsigned) (address + (i * size)));
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}
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uint32_t value = 0;
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const uint8_t *value_ptr = buffer + i * size;
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switch (size)
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{
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case 4:
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value = target_buffer_get_u32(target, value_ptr);
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break;
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case 2:
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value = target_buffer_get_u16(target, value_ptr);
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break;
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case 1:
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value = *value_ptr;
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}
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output_len += snprintf(output + output_len, sizeof(output) - output_len, value_fmt, value);
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if ((i % line_modulo == line_modulo - 1) || (i == count - 1))
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{
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command_print(cmd_ctx, "%s", output);
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output_len = 0;
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}
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}
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}
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COMMAND_HANDLER(dsp563xx_mem_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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int err = ERROR_OK;
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int read_mem;
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uint32_t address = 0;
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uint32_t count = 1, i;
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uint32_t pattern = 0;
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uint32_t mem_type;
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uint8_t *buffer, *b;
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switch (CMD_NAME[1])
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{
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case 'w':
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read_mem = 0;
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break;
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case 'd':
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read_mem = 1;
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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switch (CMD_NAME[3])
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{
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case 'x':
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mem_type = MEM_X;
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break;
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case 'y':
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mem_type = MEM_Y;
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break;
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case 'p':
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mem_type = MEM_P;
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (CMD_ARGC > 0)
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{
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
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}
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if (read_mem == 0)
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{
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if (CMD_ARGC < 2)
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{
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (CMD_ARGC > 1)
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{
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], pattern);
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}
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if (CMD_ARGC > 2)
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{
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
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}
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}
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if (read_mem == 1)
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{
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if (CMD_ARGC < 1)
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{
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (CMD_ARGC > 1)
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{
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], count);
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}
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}
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buffer = calloc(count, sizeof(uint32_t));
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if (read_mem == 1)
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{
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if ((err = dsp563xx_read_memory(target, mem_type, address, sizeof(uint32_t), count, buffer)) == ERROR_OK)
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handle_md_output(CMD_CTX, target, address, sizeof(uint32_t), count, buffer);
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}
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else
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{
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b = buffer;
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for (i = 0; i < count; i++)
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{
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target_buffer_set_u32(target, b, pattern);
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b += 4;
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}
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err = dsp563xx_write_memory(target, mem_type, address, sizeof(uint32_t), count, buffer);
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}
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free(buffer);
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return err;
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}
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static const struct command_registration dsp563xx_command_handlers[] = {
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{
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.name = "mwwx",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
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.help = "write x memory words",
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.usage = "mwwx address value [count]",
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},
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{
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.name = "mwwy",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
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.help = "write y memory words",
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.usage = "mwwy address value [count]",
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},
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{
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.name = "mwwp",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
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.help = "write p memory words",
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.usage = "mwwp address value [count]",
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},
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{
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.name = "mdwx",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
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.help = "display x memory words",
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.usage = "mdwx address [count]",
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},
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{
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.name = "mdwy",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
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.help = "display y memory words",
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.usage = "mdwy address [count]",
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},
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{
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.name = "mdwp",
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.handler = dsp563xx_mem_command,
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.mode = COMMAND_EXEC,
|
||||
.help = "display p memory words",
|
||||
.usage = "mdwp address [count]",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
/** Holds methods for DSP563XX targets. */
|
||||
struct target_type dsp563xx_target = {
|
||||
.name = "dsp563xx",
|
||||
|
|
@ -1249,6 +1486,7 @@ struct target_type dsp563xx_target = {
|
|||
.read_memory = dsp563xx_read_memory_p,
|
||||
.write_memory = dsp563xx_write_memory_p,
|
||||
|
||||
.commands = dsp563xx_command_handlers,
|
||||
.target_create = dsp563xx_target_create,
|
||||
.init_target = dsp563xx_init_target,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@
|
|||
#define JTAG_INSTR_DEBUG_REQUEST 0x07
|
||||
#define JTAG_INSTR_BYPASS 0x0F
|
||||
|
||||
static int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr_out, int dr_len, int rti)
|
||||
static inline int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (NULL == tap)
|
||||
{
|
||||
|
|
@ -56,7 +56,7 @@ static int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr
|
|||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int dsp563xx_write_dr_u8(struct jtag_tap *tap, uint8_t * dr_in, uint8_t dr_out, int dr_len, int rti)
|
||||
static inline int dsp563xx_write_dr_u8(struct jtag_tap *tap, uint8_t * dr_in, uint8_t dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (dr_len > 8)
|
||||
{
|
||||
|
|
@ -67,7 +67,7 @@ static int dsp563xx_write_dr_u8(struct jtag_tap *tap, uint8_t * dr_in, uint8_t d
|
|||
return dsp563xx_write_dr(tap, dr_in, &dr_out, dr_len, rti);
|
||||
}
|
||||
|
||||
static int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t * dr_in, uint32_t dr_out, int dr_len, int rti)
|
||||
static inline int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t * dr_in, uint32_t dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (dr_len > 32)
|
||||
{
|
||||
|
|
@ -79,7 +79,7 @@ static int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t * dr_in, uint32_
|
|||
}
|
||||
|
||||
/** single word instruction */
|
||||
static int dsp563xx_once_ir_exec(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
|
||||
static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
|
||||
{
|
||||
int err;
|
||||
|
||||
|
|
@ -90,13 +90,13 @@ static int dsp563xx_once_ir_exec(struct jtag_tap *tap, uint8_t instr, uint8_t rw
|
|||
}
|
||||
|
||||
/** single word instruction */
|
||||
static int dsp563xx_once_ir_exec_nq(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
|
||||
static inline inline int dsp563xx_once_ir_exec_nq(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
|
||||
{
|
||||
return dsp563xx_write_dr_u8(tap, 0, instr | (ex << 5) | (go << 6) | (rw << 7), 8, 0);
|
||||
}
|
||||
|
||||
/* IR and DR functions */
|
||||
static int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir_out, int ir_len, int rti)
|
||||
static inline int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (NULL == tap)
|
||||
{
|
||||
|
|
@ -114,7 +114,7 @@ static int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir
|
|||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int dsp563xx_write_ir_u8(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out, int ir_len, int rti)
|
||||
static inline int dsp563xx_write_ir_u8(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (ir_len > 8)
|
||||
{
|
||||
|
|
@ -125,7 +125,7 @@ static int dsp563xx_write_ir_u8(struct jtag_tap *tap, uint8_t * ir_in, uint8_t i
|
|||
return dsp563xx_write_ir(tap, ir_in, &ir_out, ir_len, rti);
|
||||
}
|
||||
|
||||
static int dsp563xx_jtag_sendinstr(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out)
|
||||
static inline int dsp563xx_jtag_sendinstr(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out)
|
||||
{
|
||||
return dsp563xx_write_ir_u8(tap, ir_in, ir_out, tap->ir_length, 1);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue