flash/nor: Add support for sector erase in stm32l4x.c for L4+ family
Updates support for L4+ device id: 0x470 added by #4310 Extends #4641 to account for L4+ use of multiple DBANK option bits Enables L4+ 1M and 2M devices to be programmed using sector erase Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b Signed-off-by: bob <rea952@gmail.com> Reviewed-on: http://openocd.zylin.com/4777 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
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@ -33,6 +33,9 @@
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* RM0394 (STM32L43x/44x/45x/46x)
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* RM0394 (STM32L43x/44x/45x/46x)
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* http://www.st.com/resource/en/reference_manual/dm00151940.pdf
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* http://www.st.com/resource/en/reference_manual/dm00151940.pdf
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*
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*
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* RM0432 (STM32L4R/4Sxx)
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* http://www.st.com/resource/en/reference_manual/dm00310109.pdf
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*
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* STM32L476RG Datasheet (for erase timing)
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* STM32L476RG Datasheet (for erase timing)
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* http://www.st.com/resource/en/datasheet/stm32l476rg.pdf
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* http://www.st.com/resource/en/datasheet/stm32l476rg.pdf
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*
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*
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@ -43,6 +46,14 @@
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*
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*
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* RM0394 devices have a single bank only.
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* RM0394 devices have a single bank only.
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*
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*
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* RM0432 devices have single and dual bank operating modes.
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* The FLASH size is 1Mbyte or 2Mbyte.
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* Bank page (sector) size is 4Kbyte (dual mode) or 8Kbyte (single mode).
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*
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* Bank mode is controlled by two different bits in option bytes register.
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* In 2M FLASH devices bit 22 (DBANK) controls Dual Bank mode.
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* In 1M FLASH devices bit 21 (DB1M) controls Dual Bank mode.
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*
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*/
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*/
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/* Erase time can be as high as 25ms, 10x this and assume it's toast... */
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/* Erase time can be as high as 25ms, 10x this and assume it's toast... */
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@ -93,7 +104,8 @@
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/* STM32_FLASH_OBR bit definitions (reading) */
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/* STM32_FLASH_OBR bit definitions (reading) */
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#define OPT_DUALBANK (1 << 21) /* dual flash bank only */
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#define OPT_DBANK_LE_1M (1 << 21) /* dual bank for devices up to 1M flash */
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#define OPT_DBANK_GE_2M (1 << 22) /* dual bank for devices with 2M flash */
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/* register unlock keys */
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/* register unlock keys */
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@ -325,7 +337,7 @@ static int stm32l4_protect_check(struct flash_bank *bank)
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bank->sectors[i].is_protected = 0;
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bank->sectors[i].is_protected = 0;
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} else {
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} else {
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uint8_t snb;
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uint8_t snb;
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snb = i - stm32l4_info->bank2_start + 256;
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snb = i - stm32l4_info->bank2_start;
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if (((snb >= wrp2a_start) &&
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if (((snb >= wrp2a_start) &&
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(snb <= wrp2a_end)) ||
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(snb <= wrp2a_end)) ||
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((snb >= wrp2b_start) &&
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((snb >= wrp2b_start) &&
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@ -374,7 +386,7 @@ static int stm32l4_erase(struct flash_bank *bank, int first, int last)
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if (i >= stm32l4_info->bank2_start) {
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if (i >= stm32l4_info->bank2_start) {
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uint8_t snb;
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uint8_t snb;
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snb = (i - stm32l4_info->bank2_start) + 256;
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snb = i - stm32l4_info->bank2_start;
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erase_flags |= snb << FLASH_PAGE_SHIFT | FLASH_CR_BKER;
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erase_flags |= snb << FLASH_PAGE_SHIFT | FLASH_CR_BKER;
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} else
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} else
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erase_flags |= i << FLASH_PAGE_SHIFT;
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erase_flags |= i << FLASH_PAGE_SHIFT;
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@ -473,7 +485,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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* buffer, free the algorithm */
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* buffer, free the algorithm */
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target_free_working_area(target, write_algorithm);
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target_free_working_area(target, write_algorithm);
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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LOG_WARNING("large enough working area not available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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}
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}
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}
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@ -594,6 +606,9 @@ static int stm32l4_probe(struct flash_bank *bank)
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/* set max flash size depending on family */
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/* set max flash size depending on family */
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switch (device_id & 0xfff) {
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switch (device_id & 0xfff) {
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case 0x470:
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max_flash_size_in_kb = 2048;
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break;
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case 0x461:
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case 0x461:
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case 0x415:
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case 0x415:
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max_flash_size_in_kb = 1024;
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max_flash_size_in_kb = 1024;
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@ -605,7 +620,7 @@ static int stm32l4_probe(struct flash_bank *bank)
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max_flash_size_in_kb = 256;
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max_flash_size_in_kb = 256;
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break;
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break;
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default:
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default:
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LOG_WARNING("Cannot identify target as a STM32L4 family.");
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LOG_WARNING("Cannot identify target as an STM32L4 family device.");
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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@ -622,45 +637,77 @@ static int stm32l4_probe(struct flash_bank *bank)
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LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
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LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
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/* did we assign flash size? */
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/* did we assign a flash size? */
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assert(flash_size_in_kb != 0xffff);
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assert((flash_size_in_kb != 0xffff) && flash_size_in_kb);
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/* get options to for DUAL BANK. */
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/* get options for DUAL BANK. */
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retval = target_read_u32(target, STM32_FLASH_OPTR, &options);
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retval = target_read_u32(target, STM32_FLASH_OPTR, &options);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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/* did we assign flash size? */
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int num_pages = 0;
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assert((flash_size_in_kb != 0xffff) && flash_size_in_kb);
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int page_size = 0;
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/* calculate numbers of pages */
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int num_pages = flash_size_in_kb / 2;
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switch (device_id & 0xfff) {
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case 0x470:
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/* L4R/S have 1M or 2M FLASH and dual/single bank mode.
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* Page size is 4K or 8K.*/
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if (flash_size_in_kb == 2048) {
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stm32l4_info->bank2_start = 256;
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if (options & OPT_DBANK_GE_2M) {
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page_size = 4096;
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num_pages = 512;
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} else {
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page_size = 8192;
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num_pages = 256;
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}
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break;
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}
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if (flash_size_in_kb == 1024) {
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stm32l4_info->bank2_start = 128;
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if (options & OPT_DBANK_LE_1M) {
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page_size = 4096;
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num_pages = 256;
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} else {
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page_size = 8192;
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num_pages = 128;
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}
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break;
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}
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/* Invalid FLASH size for this device. */
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LOG_WARNING("Invalid flash size for STM32L4+ family device.");
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return ERROR_FAIL;
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default:
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/* Other L4 family devices have 2K pages. */
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page_size = 2048;
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num_pages = flash_size_in_kb / 2;
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/* check that calculation result makes sense */
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/* check that calculation result makes sense */
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assert(num_pages > 0);
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assert(num_pages > 0);
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if ((flash_size_in_kb == 1024) || !(options & OPT_DBANK_LE_1M))
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/* only devices with < 1024 kiB may be set to single bank dual banks */
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if ((flash_size_in_kb == 1024) || !(options & OPT_DUALBANK))
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stm32l4_info->bank2_start = 256;
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stm32l4_info->bank2_start = 256;
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else
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else
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stm32l4_info->bank2_start = num_pages / 2;
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stm32l4_info->bank2_start = num_pages / 2;
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break;
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}
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/* Release sector table if allocated. */
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if (bank->sectors) {
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if (bank->sectors) {
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free(bank->sectors);
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free(bank->sectors);
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bank->sectors = NULL;
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bank->sectors = NULL;
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}
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}
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/* Set bank configuration and construct sector table. */
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bank->base = base_address;
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bank->base = base_address;
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bank->size = num_pages * (1 << 11);
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bank->size = num_pages * page_size;
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bank->num_sectors = num_pages;
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bank->num_sectors = num_pages;
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bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
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bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
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if (!bank->sectors)
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if (!bank->sectors)
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return ERROR_FAIL; /* Checkme: What better error to use?*/
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return ERROR_FAIL; /* Checkme: What better error to use?*/
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for (i = 0; i < num_pages; i++) {
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for (i = 0; i < num_pages; i++) {
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bank->sectors[i].offset = i << 11;
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bank->sectors[i].offset = i * page_size;
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bank->sectors[i].size = 1 << 11;
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bank->sectors[i].size = page_size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = 1;
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bank->sectors[i].is_protected = 1;
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}
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}
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@ -703,6 +750,10 @@ static int get_stm32l4_info(struct flash_bank *bank, char *buf, int buf_size)
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const char *device_str;
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const char *device_str;
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switch (device_id) {
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switch (device_id) {
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case 0x470:
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device_str = "STM32L4R/4Sxx";
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break;
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case 0x461:
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case 0x461:
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device_str = "STM32L496/4A6";
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device_str = "STM32L496/4A6";
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break;
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break;
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