semihosting: move semihosting_result_t from riscv.h to the semihosting_common.h
These enum values are useful for the arch level semihosting call handlers. Currently riscv uses them, we also need similar return codes for the xtensa. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I8f63749cc203c59b07862f33edf3c393cd7e33a9 Reviewed-on: https://review.openocd.org/c/openocd/+/7039 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -2209,17 +2209,17 @@ int riscv_openocd_poll(struct target *target)
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if (halt_reason == RISCV_HALT_BREAKPOINT) {
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int retval;
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switch (riscv_semihosting(t, &retval)) {
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case SEMI_NONE:
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case SEMI_WAITING:
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case SEMIHOSTING_NONE:
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case SEMIHOSTING_WAITING:
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/* This hart should remain halted. */
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should_remain_halted++;
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break;
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case SEMI_HANDLED:
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case SEMIHOSTING_HANDLED:
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/* This hart should be resumed, along with any other
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* harts that halted due to haltgroups. */
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should_resume++;
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break;
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case SEMI_ERROR:
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case SEMIHOSTING_ERROR:
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return retval;
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}
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} else if (halt_reason != RISCV_HALT_GROUP) {
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@ -2280,15 +2280,15 @@ int riscv_openocd_poll(struct target *target)
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if (target->debug_reason == DBG_REASON_BREAKPOINT) {
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int retval;
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switch (riscv_semihosting(target, &retval)) {
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case SEMI_NONE:
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case SEMI_WAITING:
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case SEMIHOSTING_NONE:
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case SEMIHOSTING_WAITING:
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target_call_event_callbacks(target, TARGET_EVENT_HALTED);
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break;
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case SEMI_HANDLED:
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case SEMIHOSTING_HANDLED:
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if (riscv_resume(target, true, 0, 0, 0, false) != ERROR_OK)
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return ERROR_FAIL;
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break;
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case SEMI_ERROR:
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case SEMIHOSTING_ERROR:
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return retval;
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}
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} else {
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@ -10,6 +10,7 @@ struct riscv_program;
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#include "gdb_regs.h"
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#include "jtag/jtag.h"
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#include "target/register.h"
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#include "target/semihosting_common.h"
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#include <helper/command.h>
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/* The register cache is statically allocated. */
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@ -377,13 +378,8 @@ int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_wp_addre
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int riscv_init_registers(struct target *target);
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void riscv_semihosting_init(struct target *target);
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typedef enum {
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SEMI_NONE, /* Not halted for a semihosting call. */
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SEMI_HANDLED, /* Call handled, and target was resumed. */
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SEMI_WAITING, /* Call handled, target is halted waiting until we can resume. */
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SEMI_ERROR /* Something went wrong. */
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} semihosting_result_t;
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semihosting_result_t riscv_semihosting(struct target *target, int *retval);
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enum semihosting_result riscv_semihosting(struct target *target, int *retval);
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void riscv_add_bscan_tunneled_scan(struct target *target, struct scan_field *field,
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riscv_bscan_tunneled_scan_context_t *ctxt);
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@ -44,7 +44,6 @@
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#include <helper/log.h>
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#include "target/target.h"
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#include "target/semihosting_common.h"
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#include "riscv.h"
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static int riscv_semihosting_setup(struct target *target, int enable);
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@ -67,23 +66,23 @@ void riscv_semihosting_init(struct target *target)
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* @param retval Pointer to a location where the return code will be stored
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* @return non-zero value if a request was processed or an error encountered
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*/
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semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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enum semihosting_result riscv_semihosting(struct target *target, int *retval)
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{
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struct semihosting *semihosting = target->semihosting;
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if (!semihosting) {
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LOG_DEBUG(" -> NONE (!semihosting)");
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return SEMI_NONE;
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return SEMIHOSTING_NONE;
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}
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if (!semihosting->is_active) {
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LOG_DEBUG(" -> NONE (!semihosting->is_active)");
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return SEMI_NONE;
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return SEMIHOSTING_NONE;
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}
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riscv_reg_t pc;
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int result = riscv_get_register(target, &pc, GDB_REGNO_PC);
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if (result != ERROR_OK)
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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uint8_t tmp_buf[12];
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@ -92,7 +91,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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/* Instruction memories may not support arbitrary read size. Use any size that will work. */
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*retval = riscv_read_by_any_size(target, (pc - 4) + 4 * i, 4, tmp_buf + 4 * i);
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if (*retval != ERROR_OK)
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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}
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/*
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@ -111,7 +110,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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if (pre != 0x01f01013 || ebreak != 0x00100073 || post != 0x40705013) {
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/* Not the magic sequence defining semihosting. */
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LOG_DEBUG(" -> NONE (no magic)");
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return SEMI_NONE;
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return SEMIHOSTING_NONE;
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}
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/*
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@ -126,13 +125,13 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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result = riscv_get_register(target, &r0, GDB_REGNO_A0);
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if (result != ERROR_OK) {
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LOG_DEBUG(" -> ERROR (couldn't read a0)");
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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}
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result = riscv_get_register(target, &r1, GDB_REGNO_A1);
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if (result != ERROR_OK) {
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LOG_DEBUG(" -> ERROR (couldn't read a1)");
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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}
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semihosting->op = r0;
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@ -146,12 +145,12 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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*retval = semihosting_common(target);
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if (*retval != ERROR_OK) {
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LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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}
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} else {
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/* Unknown operation number, not a semihosting call. */
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LOG_DEBUG(" -> NONE (unknown operation number)");
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return SEMI_NONE;
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return SEMIHOSTING_NONE;
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}
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}
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@ -163,14 +162,14 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
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/* Resume right after the EBREAK 4 bytes instruction. */
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*retval = riscv_set_register(target, GDB_REGNO_PC, pc + 4);
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if (*retval != ERROR_OK)
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return SEMI_ERROR;
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return SEMIHOSTING_ERROR;
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LOG_DEBUG(" -> HANDLED");
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return SEMI_HANDLED;
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return SEMIHOSTING_HANDLED;
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}
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LOG_DEBUG(" -> WAITING");
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return SEMI_WAITING;
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return SEMIHOSTING_WAITING;
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}
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/* -------------------------------------------------------------------------
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@ -103,6 +103,13 @@ enum semihosting_redirect_config {
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SEMIHOSTING_REDIRECT_CFG_ALL,
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};
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enum semihosting_result {
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SEMIHOSTING_NONE, /* Not halted for a semihosting call. */
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SEMIHOSTING_HANDLED, /* Call handled, and target was resumed. */
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SEMIHOSTING_WAITING, /* Call handled, target is halted waiting until we can resume. */
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SEMIHOSTING_ERROR /* Something went wrong. */
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};
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struct target;
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/*
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