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README
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README
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OpenOCD
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OpenOCD
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Free and Open On-Chip Debugging, In-System Programming
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Free and Open On-Chip Debugging, In-System Programming
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and Boundary-Scan Testing
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and Boundary-Scan Testing
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Copyright (c) 2004-2007 Dominic Rath
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Copyright (c) 2004-2007 Dominic Rath
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The debugger uses an IEEE 1149-1 compliant JTAG TAP bus master to access on-chip
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The debugger uses an IEEE 1149-1 compliant JTAG TAP bus master to access on-chip
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debug functionality available on ARM7 and ARM9 based microcontrollers /
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debug functionality available on ARM7 and ARM9 based microcontrollers /
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system-on-chip solutions.
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system-on-chip solutions.
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User interaction is realized through a telnet command line interface and a gdb
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User interaction is realized through a telnet command line interface and a gdb
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(The GNU Debugger) remote protocol server.
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(The GNU Debugger) remote protocol server.
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1. JTAG hardware
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1. JTAG hardware
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Currently, OpenOCD supports the following JTAG interfaces:
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Currently, OpenOCD supports the following JTAG interfaces:
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- Parallel port wigglers. These devices connect to a PC's parallel port,
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- Parallel port wigglers. These devices connect to a PC's parallel port,
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providing direct access to the JTAG lines. The OpenOCD contains descriptions
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providing direct access to the JTAG lines. The OpenOCD contains descriptions
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of a few Wiggler layouts, including the original 'Wiggler' design. Other
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of a few Wiggler layouts, including the original 'Wiggler' design. Other
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layouts (i.e. mapping of parallel port pins to JTAG lines) can be added easily.
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layouts (i.e. mapping of parallel port pins to JTAG lines) can be added easily.
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Typical Wiggler speeds are around 12kByte/s code download to an ARM7's RAM.
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Typical Wiggler speeds are around 12kByte/s code download to an ARM7's RAM.
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The list of supported parallel port devices includes:
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The list of supported parallel port devices includes:
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* Macraigor Wiggler JTAG cable
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* Macraigor Wiggler JTAG cable
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* Gateworks GW16012 JTAG programmer
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* Gateworks GW16012 JTAG programmer
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* Xilinx DLC5 JTAG parallel cable III
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* Xilinx DLC5 JTAG parallel cable III
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* Ka-Ro TRITON starterkit II JTAG cable
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* Ka-Ro TRITON starterkit II JTAG cable
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* Lattice parallel port JTAG cable
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* Lattice parallel port JTAG cable
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* ST FlashLINK programming cable
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* ST FlashLINK programming cable
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- The Amontec JTAG Accelerator. This is a configuration for Amontec's Chameleon
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- The Amontec JTAG Accelerator. This is a configuration for Amontec's Chameleon
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dongle, a parallel port interface based on a Xilinx CoolRunner CPLD. It uses
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dongle, a parallel port interface based on a Xilinx CoolRunner CPLD. It uses
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the IEEE1284 EPP parallel port specification, providing many times the
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the IEEE1284 EPP parallel port specification, providing many times the
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performance achievable with wiggler-style devices. Additional information is
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performance achievable with wiggler-style devices. Additional information is
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available on www.amontec.com.
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available on www.amontec.com.
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Typical JTAG Accelerator speeds are around 120-160kByte/s to an ARM7's RAM.
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Typical JTAG Accelerator speeds are around 120-160kByte/s to an ARM7's RAM.
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- FTDI FT2232 based USB devices. The FT2232 (but not FT232 or FT245) features a
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- FTDI FT2232 based USB devices. The FT2232 (but not FT232 or FT245) features a
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multi-protocol synchronous serial engine (MPSSE) that can be used to run the
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multi-protocol synchronous serial engine (MPSSE) that can be used to run the
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serial JTAG protocol. There are several implemenations of FT2232 based devices:
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serial JTAG protocol. There are several implemenations of FT2232 based devices:
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* USBJTAG: http://www.fh-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html
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* USBJTAG: http://www.fh-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html
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The USBJTAG was designed by Prof. Hubert Hoegl to provide a high-speed USB
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The USBJTAG was designed by Prof. Hubert Hoegl to provide a high-speed USB
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interface for use with the OpenOCD. Schematics are available at the USBJTAG
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interface for use with the OpenOCD. Schematics are available at the USBJTAG
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website, and a homebrew device can easily be built using the FTDI evaluation
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website, and a homebrew device can easily be built using the FTDI evaluation
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module DLP2232M.
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module DLP2232M.
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* OOCD-Link: http://www.joernonline.de/dw/doku.php?id=en:projects:oocdlink
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* OOCD-Link: http://www.joernonline.de/dw/doku.php?id=en:projects:oocdlink
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Similar to the USBJTAG, this design comes with free schematics, too.
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Similar to the USBJTAG, this design comes with free schematics, too.
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* Amontec JTAGkey: www.amontec.com
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* Amontec JTAGkey: www.amontec.com
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The Amontec JTAGkey offers support for a wide variety of target voltages from
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The Amontec JTAGkey offers support for a wide variety of target voltages from
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1.4V to 5V. It also allows the JTAG lines and reset signals to be tri-stated,
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1.4V to 5V. It also allows the JTAG lines and reset signals to be tri-stated,
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allowing easy interfacing with a wide variety of targets.
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allowing easy interfacing with a wide variety of targets.
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* Amontec JTAGkey-Tiny: www.amontec.com
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* Amontec JTAGkey-Tiny: www.amontec.com
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The Amontec JTAGkey offers support for a wide variety of target voltages from
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The Amontec JTAGkey offers support for a wide variety of target voltages from
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2.8V to 5V. It also allows the reset signals to be tri-stated, allowing easy
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2.8V to 5V. It also allows the reset signals to be tri-stated, allowing easy
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interfacing with a wide variety of targets.
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interfacing with a wide variety of targets.
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* Olimex ARM-USB-OCD: www.olimex.com
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* Olimex ARM-USB-OCD: www.olimex.com
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The Olimex ARM-USB-OCD offers support for a wide vriety of target voltages from
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The Olimex ARM-USB-OCD offers support for a wide vriety of target voltages from
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2.0V to 5V. It also allows targets to be powered from the ARM-USB-OCD and
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2.0V to 5V. It also allows targets to be powered from the ARM-USB-OCD and
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features and additional RS232 UART.
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features and additional RS232 UART.
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* eVerve Signalyzer: www.signalyzer.com
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* eVerve Signalyzer: www.signalyzer.com
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The Signalyzer offers support for a wide variety of target voltages from 1.2V to
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The Signalyzer offers support for a wide variety of target voltages from 1.2V to
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5.5V. A second connector provides access to a TTL level UART.
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5.5V. A second connector provides access to a TTL level UART.
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* TinCanTools 'Flyswatter' USB JTAG programmer.
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* TinCanTools 'Flyswatter' USB JTAG programmer.
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* Turtelizer 2: http://www.ethernut.de/en/hardware/turtelizer/index.html
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* Turtelizer 2: http://www.ethernut.de/en/hardware/turtelizer/index.html
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Another USB JTAG programmer, with freely available schematics. It supports
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Another USB JTAG programmer, with freely available schematics. It supports
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target voltages from 1.65V to 5.5V.
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target voltages from 1.65V to 5.5V.
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* Hitex STR9-comSTICK: http://www.ehitex.de/p_info.php?products_id=292
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* Hitex STR9-comSTICK: http://www.ehitex.de/p_info.php?products_id=292
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A STR912FW44x microcontroller "board" with USB and JTAG functionality.
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A STR912FW44x microcontroller "board" with USB and JTAG functionality.
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* Luminary Micro development board evb_lm3s811 JTAG interface.
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* Luminary Micro development board evb_lm3s811 JTAG interface.
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* ASIX PRESTO: http://www.asix-tools.com/prg_presto.htm
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* ASIX PRESTO: http://www.asix-tools.com/prg_presto.htm
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The ASIX PRESTO is a USB JTAG programmer for a wide range of components, e.g.
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The ASIX PRESTO is a USB JTAG programmer for a wide range of components, e.g.
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microcontrollers, serial EEPROM and Flash memory chips, CPLDs and others.
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microcontrollers, serial EEPROM and Flash memory chips, CPLDs and others.
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* usbprog: http://www.embedded-projects.net/index.php?page_id=165
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* usbprog: http://www.embedded-projects.net/index.php?page_id=165
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The usbprog is a freely programmable USB adapter, which can (among other
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The usbprog is a freely programmable USB adapter, which can (among other
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things) use a firmware which turns it into a JTAG programmer/debugger.
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things) use a firmware which turns it into a JTAG programmer/debugger.
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All FT2232 based devices may be accessed using either FTDI's proprietary FTD2XX
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All FT2232 based devices may be accessed using either FTDI's proprietary FTD2XX
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library (www.ftdichip.com) or using an open-source replacement from
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library (www.ftdichip.com) or using an open-source replacement from
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http://www.intra2net.com/de/produkte/opensource/ftdi/index.php, also included
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http://www.intra2net.com/de/produkte/opensource/ftdi/index.php, also included
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with many Linux distributions.
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with many Linux distributions.
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2. Supported cores
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2. Supported cores
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This version of openocd supports the following ARM7/9 cores:
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This version of openocd supports the following ARM7/9 cores:
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- ARM7TDMI(-s)
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- ARM7TDMI(-s)
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- ARM9TDMI
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- ARM9TDMI
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- ARM920t
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- ARM920t
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- ARM922t
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- ARM922t
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- ARM926ej-s
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- ARM926ej-s
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- ARM966e
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- ARM966e
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- Cortex-M3
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- Cortex-M3
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Support for Intel XScale CPUs is also included:
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Support for Intel XScale CPUs is also included:
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- PXA25x
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- PXA25x
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- PXA27x
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- PXA27x
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- IXP42x
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- IXP42x
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And support for the Marvell Feroceon CPU core as found in the
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And support for the Marvell Feroceon CPU core as found in the
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Orion SOC family is included as well.
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Orion SOC family is included as well.
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3. Host platforms
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3. Host platforms
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OpenOCD was originally developed on x86-Linux, but has since then been ported
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OpenOCD was originally developed on x86-Linux, but has since then been ported
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to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, IA64-Linux,
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to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, IA64-Linux,
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AMD64-Linux, Alpha-Linux, ARM-Linux, and PowerPC OS-X.
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AMD64-Linux, Alpha-Linux, ARM-Linux, and PowerPC OS-X.
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4. Documentation
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4. Documentation
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Documentation for the OpenOCD is hosted in the Berlios OpenFacts Wiki at
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Documentation for the OpenOCD is hosted in the Berlios OpenFacts Wiki at
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http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger.
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http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger.
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5. Licensing
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5. Licensing
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OpenOCD is licensed under the terms of the GNU General Public License, see the
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OpenOCD is licensed under the terms of the GNU General Public License, see the
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file COPYING for details.
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file COPYING for details.
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3824
doc/openocd.texi
3824
doc/openocd.texi
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