Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.
E.g. STM32F7 implements Rev.2. Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision. Change-Id: I48756b0451c7359475066969c900978a536bc328 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2868 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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@ -1125,7 +1125,6 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
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{
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{
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int retval;
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int retval;
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int fp_num = 0;
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int fp_num = 0;
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uint32_t hilo;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
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struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
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@ -1138,6 +1137,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
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breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address);
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breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address);
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if (breakpoint->type == BKPT_HARD) {
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if (breakpoint->type == BKPT_HARD) {
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uint32_t fpcr_value;
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while (comparator_list[fp_num].used && (fp_num < cortex_m->fp_num_code))
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while (comparator_list[fp_num].used && (fp_num < cortex_m->fp_num_code))
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fp_num++;
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fp_num++;
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if (fp_num >= cortex_m->fp_num_code) {
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if (fp_num >= cortex_m->fp_num_code) {
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@ -1145,9 +1145,17 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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breakpoint->set = fp_num + 1;
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breakpoint->set = fp_num + 1;
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hilo = (breakpoint->address & 0x2) ? FPCR_REPLACE_BKPT_HIGH : FPCR_REPLACE_BKPT_LOW;
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fpcr_value = breakpoint->address | 1;
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if (cortex_m->fp_rev == 0) {
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uint32_t hilo;
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hilo = (breakpoint->address & 0x2) ? FPCR_REPLACE_BKPT_HIGH : FPCR_REPLACE_BKPT_LOW;
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fpcr_value = (fpcr_value & 0x1FFFFFFC) | hilo | 1;
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} else if (cortex_m->fp_rev > 1) {
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LOG_ERROR("Unhandled Cortex-M Flash Patch Breakpoint architecture revision");
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return ERROR_FAIL;
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}
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comparator_list[fp_num].used = 1;
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comparator_list[fp_num].used = 1;
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comparator_list[fp_num].fpcr_value = (breakpoint->address & 0x1FFFFFFC) | hilo | 1;
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comparator_list[fp_num].fpcr_value = fpcr_value;
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target_write_u32(target, comparator_list[fp_num].fpcr_address,
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target_write_u32(target, comparator_list[fp_num].fpcr_address,
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comparator_list[fp_num].fpcr_value);
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comparator_list[fp_num].fpcr_value);
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LOG_DEBUG("fpc_num %i fpcr_value 0x%" PRIx32 "",
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LOG_DEBUG("fpc_num %i fpcr_value 0x%" PRIx32 "",
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@ -1962,6 +1970,9 @@ int cortex_m_examine(struct target *target)
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cortex_m->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF);
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cortex_m->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF);
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cortex_m->fp_num_lit = (fpcr >> 8) & 0xF;
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cortex_m->fp_num_lit = (fpcr >> 8) & 0xF;
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cortex_m->fp_code_available = cortex_m->fp_num_code;
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cortex_m->fp_code_available = cortex_m->fp_num_code;
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/* Detect flash patch revision, see RM DDI 0403E.b page C1-817.
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Revision is zero base, fp_rev == 1 means Rev.2 ! */
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cortex_m->fp_rev = (fpcr >> 28) & 0xf;
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free(cortex_m->fp_comparator_list);
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free(cortex_m->fp_comparator_list);
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cortex_m->fp_comparator_list = calloc(
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cortex_m->fp_comparator_list = calloc(
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cortex_m->fp_num_code + cortex_m->fp_num_lit,
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cortex_m->fp_num_code + cortex_m->fp_num_lit,
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@ -175,6 +175,7 @@ struct cortex_m_common {
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int fp_num_lit;
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int fp_num_lit;
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int fp_num_code;
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int fp_num_code;
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int fp_code_available;
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int fp_code_available;
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int fp_rev;
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int fpb_enabled;
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int fpb_enabled;
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int auto_bp_type;
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int auto_bp_type;
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struct cortex_m_fp_comparator *fp_comparator_list;
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struct cortex_m_fp_comparator *fp_comparator_list;
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