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- updated svn:eol-style prop to native 

git-svn-id: svn://svn.berlios.de/openocd/trunk@418 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak 2008-03-01 16:26:48 +00:00
parent 5a0910206c
commit 06433b2d64
22 changed files with 1631 additions and 1631 deletions
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20
testing/examples/LPC2148Test/prj/eclipse_ram.gdb
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@ -1,11 +1,11 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable monitor arm7_9 sw_bkpts enable
monitor mww 0xE01FC040 0x0002 monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040 monitor mdw 0xE01FC040
load load
break main break main
continue continue

20
testing/examples/LPC2148Test/prj/eclipse_rom.gdb
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@ -1,11 +1,11 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable monitor arm7_9 force_hw_bkpts enable
monitor mww 0xE01FC040 0x0002 monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040 monitor mdw 0xE01FC040
load load
break main break main
continue continue

76
testing/examples/LPC2148Test/prj/lpc2148_jtagkey.cfg
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@ -1,38 +1,38 @@
#daemon configuration #daemon configuration
telnet_port 4444 telnet_port 4444
gdb_port 3333 gdb_port 3333
# tell gdb our flash memory map # tell gdb our flash memory map
# and enable flash programming # and enable flash programming
gdb_memory_map enable gdb_memory_map enable
gdb_flash_program enable gdb_flash_program enable
#interface #interface
interface ft2232 interface ft2232
ft2232_device_desc "Amontec JTAGkey A" ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8 ft2232_vid_pid 0x0403 0xcff8
jtag_speed 3 jtag_speed 3
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst reset_config trst_and_srst srst_pulls_trst
#jtag scan chain #jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
#target configuration #target configuration
daemon_startup reset daemon_startup reset
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4 target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30 run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup working_area 0 0x40000000 0x4000 nobackup
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> #flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

280
testing/examples/LPC2148Test/prj/lpc2148_ram.ld
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@ -1,140 +1,140 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 18.12.06 mifi First Version * 18.12.06 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
/* /*
* This file, olimex_lpcp2148_ram.ld, locate the program in the internal * This file, olimex_lpcp2148_ram.ld, locate the program in the internal
* ram of the LPC2148. For more information about the memory of the LPC2148 * ram of the LPC2148. For more information about the memory of the LPC2148
* take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL. * take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL.
* Reference is made to the user manual from 25 July 2006 Rev. 02 * Reference is made to the user manual from 25 July 2006 Rev. 02
* *
* Take a look at page 8, section 1.Memory maps * Take a look at page 8, section 1.Memory maps
*/ */
MEMORY MEMORY
{ {
ram : org = 0x40000000, len = 32k ram : org = 0x40000000, len = 32k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > ram } > ram
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

282
testing/examples/LPC2148Test/prj/lpc2148_rom.ld
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@ -1,141 +1,141 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 26.01.08 mifi First Version * 26.01.08 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
/* /*
* This file, olimex_lpcp2148_ram.ld, locate the program in the internal * This file, olimex_lpcp2148_ram.ld, locate the program in the internal
* ram of the LPC2148. For more information about the memory of the LPC2148 * ram of the LPC2148. For more information about the memory of the LPC2148
* take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL. * take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL.
* Reference is made to the user manual from 25 July 2006 Rev. 02 * Reference is made to the user manual from 25 July 2006 Rev. 02
* *
* Take a look at page 8, section 1.Memory maps * Take a look at page 8, section 1.Memory maps
*/ */
MEMORY MEMORY
{ {
rom : org = 0x00000000, len = 512k rom : org = 0x00000000, len = 512k
ram : org = 0x40000000, len = 32k ram : org = 0x40000000, len = 32k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > rom } > rom
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

20
testing/examples/LPC2294Test/prj/eclipse_ram.gdb
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@ -1,11 +1,11 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable monitor arm7_9 sw_bkpts enable
monitor mww 0xE01FC040 0x0002 monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040 monitor mdw 0xE01FC040
load load
break main break main
continue continue

20
testing/examples/LPC2294Test/prj/eclipse_rom.gdb
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@ -1,11 +1,11 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable monitor arm7_9 force_hw_bkpts enable
monitor mww 0xE01FC040 0x0002 monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040 monitor mdw 0xE01FC040
load load
break main break main
continue continue

78
testing/examples/LPC2294Test/prj/lpc2294_jtagkey.cfg
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@ -1,39 +1,39 @@
#daemon configuration #daemon configuration
telnet_port 4444 telnet_port 4444
gdb_port 3333 gdb_port 3333
# tell gdb our flash memory map # tell gdb our flash memory map
# and enable flash programming # and enable flash programming
gdb_memory_map enable gdb_memory_map enable
gdb_flash_program enable gdb_flash_program enable
#interface #interface
interface ft2232 interface ft2232
ft2232_device_desc "Amontec JTAGkey A" ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8 ft2232_vid_pid 0x0403 0xcff8
jtag_speed 3 jtag_speed 3
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst reset_config trst_and_srst srst_pulls_trst
#jtag scan chain #jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
#target configuration #target configuration
daemon_startup reset daemon_startup reset
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4 target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30 run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup working_area 0 0x40000000 0x4000 nobackup
#flash configuration #flash configuration
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> #flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

280
testing/examples/LPC2294Test/prj/lpc2294_ram.ld
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@ -1,140 +1,140 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 31.03.06 mifi First Version * 31.03.06 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
/* /*
* This file, olimex_lpce2294_ram.ld, locate the program in the internal * This file, olimex_lpce2294_ram.ld, locate the program in the internal
* ram of the LPC2294. For more information about the memory of the LPC2294 * ram of the LPC2294. For more information about the memory of the LPC2294
* take a look in the LPC2119/2129/2194/2292/2294 USER MANUAL. * take a look in the LPC2119/2129/2194/2292/2294 USER MANUAL.
* Reference is made to the user manual from 2004 May 03 * Reference is made to the user manual from 2004 May 03
* *
* Take a look at page 48, section 2.Memory Addressing * Take a look at page 48, section 2.Memory Addressing
*/ */
MEMORY MEMORY
{ {
ram : org = 0x40000000, len = 16k ram : org = 0x40000000, len = 16k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > ram } > ram
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

282
testing/examples/LPC2294Test/prj/lpc2294_rom.ld
View File

@ -1,141 +1,141 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 31.03.06 mifi First Version * 31.03.06 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
/* /*
* This file, olimex_lpce2294_ram.ld, locate the program in the internal * This file, olimex_lpce2294_ram.ld, locate the program in the internal
* ram of the LPC2294. For more information about the memory of the LPC2294 * ram of the LPC2294. For more information about the memory of the LPC2294
* take a look in the LPC2119/2129/2194/2292/2294 USER MANUAL. * take a look in the LPC2119/2129/2194/2292/2294 USER MANUAL.
* Reference is made to the user manual from 2004 May 03 * Reference is made to the user manual from 2004 May 03
* *
* Take a look at page 48, section 2.Memory Addressing * Take a look at page 48, section 2.Memory Addressing
*/ */
MEMORY MEMORY
{ {
rom : org = 0x00000000, len = 256k rom : org = 0x00000000, len = 256k
ram : org = 0x40000000, len = 16k ram : org = 0x40000000, len = 16k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > rom } > rom
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

64
testing/examples/SAM7S256Test/prj/eclipse_ram.gdb
View File

@ -1,32 +1,32 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable monitor arm7_9 sw_bkpts enable
# WDT_MR, disable watchdog # WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000 monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset # RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001 monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR # CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601 monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10 monitor sleep 10
# CKGR_PLLR # CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10 monitor sleep 10
# PMC_MCKR # PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007 monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10 monitor sleep 10
# PMC_IER # PMC_IER
monitor mww 0xFFFFFF60 0x00480100 monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100 monitor sleep 100
load load
break main break main
continue continue

64
testing/examples/SAM7S256Test/prj/eclipse_rom.gdb
View File

@ -1,32 +1,32 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable monitor arm7_9 force_hw_bkpts enable
# WDT_MR, disable watchdog # WDT_MR, disable watchdog
monitor mww 0xFFFFFD44 0x00008000 monitor mww 0xFFFFFD44 0x00008000
# RSTC_MR, enable user reset # RSTC_MR, enable user reset
monitor mww 0xfffffd08 0xa5000001 monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR # CKGR_MOR
monitor mww 0xFFFFFC20 0x00000601 monitor mww 0xFFFFFC20 0x00000601
monitor sleep 10 monitor sleep 10
# CKGR_PLLR # CKGR_PLLR
monitor mww 0xFFFFFC2C 0x00481c0e monitor mww 0xFFFFFC2C 0x00481c0e
monitor sleep 10 monitor sleep 10
# PMC_MCKR # PMC_MCKR
monitor mww 0xFFFFFC30 0x00000007 monitor mww 0xFFFFFC30 0x00000007
monitor sleep 10 monitor sleep 10
# PMC_IER # PMC_IER
monitor mww 0xFFFFFF60 0x00480100 monitor mww 0xFFFFFF60 0x00480100
monitor sleep 100 monitor sleep 100
load load
break main break main
continue continue

86
testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg
View File

@ -1,43 +1,43 @@
#daemon configuration #daemon configuration
telnet_port 4444 telnet_port 4444
gdb_port 3333 gdb_port 3333
# tell gdb our flash memory map # tell gdb our flash memory map
# and enable flash programming # and enable flash programming
gdb_memory_map enable gdb_memory_map enable
gdb_flash_program enable gdb_flash_program enable
#interface #interface
interface ft2232 interface ft2232
ft2232_device_desc "Amontec JTAGkey A" ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8 ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0 jtag_speed 0
jtag_nsrst_delay 200 jtag_nsrst_delay 200
jtag_ntrst_delay 200 jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst reset_config srst_only srst_pulls_trst
#jtag scan chain #jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
#target configuration #target configuration
daemon_startup reset daemon_startup reset
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi target arm7tdmi little run_and_init 0 arm7tdmi
run_and_halt_time 0 30 run_and_halt_time 0 30
target_script 0 reset .\prj\sam7s256_reset.script target_script 0 reset .\prj\sam7s256_reset.script
working_area 0 0x00200000 0x4000 nobackup working_area 0 0x00200000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width> #flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank at91sam7 0 0 0 0 0 flash bank at91sam7 0 0 0 0 0
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

264
testing/examples/SAM7S256Test/prj/sam7s256_ram.ld
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@ -1,132 +1,132 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 30.03.06 mifi First Version * 30.03.06 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
MEMORY MEMORY
{ {
ram : org = 0x00200000, len = 64k ram : org = 0x00200000, len = 64k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > ram } > ram
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

34
testing/examples/SAM7S256Test/prj/sam7s256_reset.script
View File

@ -1,17 +1,17 @@
# #
# Init - taken form the script openocd_at91sam7_ecr.script # Init - taken form the script openocd_at91sam7_ecr.script
# #
# I take this script from the following page: # I take this script from the following page:
# #
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html # http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
# #
mww 0xfffffd44 0x00008000 # disable watchdog mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
sleep 10 sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
sleep 10 sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
sleep 10 sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
sleep 100 sleep 100

266
testing/examples/SAM7S256Test/prj/sam7s256_rom.ld
View File

@ -1,133 +1,133 @@
/**************************************************************************** /****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved. * Copyright (c) 2006 by Michael Fischer. All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may * 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software * be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
* *
**************************************************************************** ****************************************************************************
* *
* History: * History:
* *
* 26.01.08 mifi First Version * 26.01.08 mifi First Version
****************************************************************************/ ****************************************************************************/
ENTRY(ResetHandler) ENTRY(ResetHandler)
SEARCH_DIR(.) SEARCH_DIR(.)
/* /*
* Define stack size here * Define stack size here
*/ */
FIQ_STACK_SIZE = 0x0100; FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100; IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100; ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100; UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400; SVC_STACK_SIZE = 0x0400;
MEMORY MEMORY
{ {
rom : org = 0x00100000, len = 256k rom : org = 0x00100000, len = 256k
ram : org = 0x00200000, len = 64k ram : org = 0x00200000, len = 64k
} }
/* /*
* Do not change the next code * Do not change the next code
*/ */
SECTIONS SECTIONS
{ {
.text : .text :
{ {
*(.vectors); *(.vectors);
. = ALIGN(4); . = ALIGN(4);
*(.init); *(.init);
. = ALIGN(4); . = ALIGN(4);
*(.text); *(.text);
. = ALIGN(4); . = ALIGN(4);
*(.rodata); *(.rodata);
. = ALIGN(4); . = ALIGN(4);
*(.rodata*); *(.rodata*);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7t); *(.glue_7t);
. = ALIGN(4); . = ALIGN(4);
*(.glue_7); *(.glue_7);
. = ALIGN(4); . = ALIGN(4);
etext = .; etext = .;
} > rom } > rom
.data : .data :
{ {
PROVIDE (__data_start = .); PROVIDE (__data_start = .);
*(.data) *(.data)
. = ALIGN(4); . = ALIGN(4);
edata = .; edata = .;
_edata = .; _edata = .;
PROVIDE (__data_end = .); PROVIDE (__data_end = .);
} > ram } > ram
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.bss) *(.bss)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__bss_end = .); PROVIDE (__bss_end = .);
. = ALIGN(256); . = ALIGN(256);
PROVIDE (__stack_start = .); PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .); PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE; . += FIQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_fiq_end = .); PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .); PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE; . += IRQ_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_irq_end = .); PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .); PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE; . += ABT_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_abt_end = .); PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .); PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE; . += UND_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_und_end = .); PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .); PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE; . += SVC_STACK_SIZE;
. = ALIGN(4); . = ALIGN(4);
PROVIDE (__stack_svc_end = .); PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .); PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .); PROVIDE (__heap_start = .);
} > ram } > ram
} }
/*** EOF ***/ /*** EOF ***/

42
testing/examples/STR912Test/prj/eclipse_ram.gdb
View File

@ -1,21 +1,21 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable monitor arm7_9 sw_bkpts enable
# Set SRAM size to 96 KB # Set SRAM size to 96 KB
monitor mww 0x5C002034 0x0197 monitor mww 0x5C002034 0x0197
monitor mdw 0x5C002034 monitor mdw 0x5C002034
# Set Flash, Bank0 size to 512 KB # Set Flash, Bank0 size to 512 KB
monitor mww 0x54000000 0xf monitor mww 0x54000000 0xf
load load
break main break main
continue continue

42
testing/examples/STR912Test/prj/eclipse_rom.gdb
View File

@ -1,21 +1,21 @@
target remote localhost:3333 target remote localhost:3333
monitor reset monitor reset
monitor sleep 500 monitor sleep 500
monitor poll monitor poll
monitor soft_reset_halt monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable monitor arm7_9 force_hw_bkpts enable
# Set SRAM size to 96 KB # Set SRAM size to 96 KB
monitor mww 0x5C002034 0x0197 monitor mww 0x5C002034 0x0197
monitor mdw 0x5C002034 monitor mdw 0x5C002034
# Set Flash, Bank0 size to 512 KB # Set Flash, Bank0 size to 512 KB
monitor mww 0x54000000 0xf monitor mww 0x54000000 0xf
load load
break main break main
continue continue

90
testing/examples/STR912Test/prj/str912_jtagkey.cfg
View File

@ -1,45 +1,45 @@
#daemon configuration #daemon configuration
telnet_port 4444 telnet_port 4444
gdb_port 3333 gdb_port 3333
# tell gdb our flash memory map # tell gdb our flash memory map
# and enable flash programming # and enable flash programming
gdb_memory_map enable gdb_memory_map enable
gdb_flash_program enable gdb_flash_program enable
#interface #interface
interface ft2232 interface ft2232
ft2232_device_desc "Amontec JTAGkey A" ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8 ft2232_vid_pid 0x0403 0xcff8
jtag_speed 1 jtag_speed 1
jtag_nsrst_delay 100 jtag_nsrst_delay 100
jtag_ntrst_delay 100 jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst reset_config trst_and_srst
#jtag scan chain #jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 8 0x1 0x1 0xfe jtag_device 8 0x1 0x1 0xfe
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e jtag_device 5 0x1 0x1 0x1e
#target configuration #target configuration
daemon_startup reset daemon_startup reset
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm966e little reset_halt 1 arm966e target arm966e little reset_halt 1 arm966e
run_and_halt_time 0 30 run_and_halt_time 0 30
target_script 0 gdb_program_config .\prj\str912_program.script target_script 0 gdb_program_config .\prj\str912_program.script
working_area 0 0x50000000 16384 nobackup working_area 0 0x50000000 16384 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant> #flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0 flash bank str9x 0x00000000 0x00080000 0 0 0
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

18
testing/examples/STR912Test/prj/str912_program.script
View File

@ -1,9 +1,9 @@
str9x flash_config 0 4 2 0 0x80000 str9x flash_config 0 4 2 0 0x80000
flash protect 0 0 7 off flash protect 0 0 7 off

436
testing/examples/STR912Test/prj/str912_ram.ld
View File

@ -1,218 +1,218 @@
/*********************************************************************************** /***********************************************************************************
* Copyright 2005 Anglia Design * Copyright 2005 Anglia Design
* This demo code and associated components are provided as is and has no warranty, * This demo code and associated components are provided as is and has no warranty,
* implied or otherwise. You are free to use/modify any of the provided * implied or otherwise. You are free to use/modify any of the provided
* code at your own risk in your applications with the expressed limitation * code at your own risk in your applications with the expressed limitation
* of liability (see below) * of liability (see below)
* *
* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR * LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* *
* Author : Spencer Oliver * Author : Spencer Oliver
* Web : www.anglia-designs.com * Web : www.anglia-designs.com
* *
***********************************************************************************/ ***********************************************************************************/
/* Stack Sizes */ /* Stack Sizes */
_STACKSIZE = 1024; _STACKSIZE = 1024;
_STACKSIZE_IRQ = 256; _STACKSIZE_IRQ = 256;
_STACKSIZE_FIQ = 0; _STACKSIZE_FIQ = 0;
_STACKSIZE_SVC = 1024; _STACKSIZE_SVC = 1024;
_STACKSIZE_ABT = 0; _STACKSIZE_ABT = 0;
_STACKSIZE_UND = 0; _STACKSIZE_UND = 0;
_HEAPSIZE = 1024; _HEAPSIZE = 1024;
/* Memory Definitions */ /* Memory Definitions */
MEMORY MEMORY
{ {
DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000 DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000
} }
/* Section Definitions */ /* Section Definitions */
SECTIONS SECTIONS
{ {
/* first section is .text which is used for code */ /* first section is .text which is used for code */
.text : .text :
{ {
KEEP(*(.vectors)) KEEP(*(.vectors))
KEEP(*(.init)) KEEP(*(.init))
*(.text .text.*) *(.text .text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
*(.glue_7t .glue_7) *(.glue_7t .glue_7)
KEEP(*(.fini)) KEEP(*(.fini))
*(.gcc_except_table) *(.gcc_except_table)
} >DATA =0 } >DATA =0
. = ALIGN(4); . = ALIGN(4);
/* .ctors .dtors are used for c++ constructors/destructors */ /* .ctors .dtors are used for c++ constructors/destructors */
.ctors : .ctors :
{ {
PROVIDE(__ctors_start__ = .); PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*))) KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors)) KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .); PROVIDE(__ctors_end__ = .);
} >DATA } >DATA
.dtors : .dtors :
{ {
PROVIDE(__dtors_start__ = .); PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*))) KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors)) KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .); PROVIDE(__dtors_end__ = .);
} >DATA } >DATA
/* .rodata section which is used for read-only data (constants) */ /* .rodata section which is used for read-only data (constants) */
.rodata : .rodata :
{ {
*(.rodata .rodata.*) *(.rodata .rodata.*)
*(.gnu.linkonce.r.*) *(.gnu.linkonce.r.*)
} >DATA } >DATA
. = ALIGN(4); . = ALIGN(4);
_etext = .; _etext = .;
PROVIDE (etext = .); PROVIDE (etext = .);
/* .data section which is used for initialized data */ /* .data section which is used for initialized data */
.data : AT (_etext) .data : AT (_etext)
{ {
*(.data .data.*) *(.data .data.*)
*(.gnu.linkonce.d.*) *(.gnu.linkonce.d.*)
SORT(CONSTRUCTORS) SORT(CONSTRUCTORS)
} >DATA } >DATA
. = ALIGN(4); . = ALIGN(4);
__data_start = .; __data_start = .;
_edata = .; _edata = .;
PROVIDE (edata = .); PROVIDE (edata = .);
/* .bss section which is used for uninitialized data */ /* .bss section which is used for uninitialized data */
.bss : .bss :
{ {
__bss_start = .; __bss_start = .;
__bss_start__ = .; __bss_start__ = .;
*(.bss .bss.*) *(.bss .bss.*)
*(.gnu.linkonce.b.*) *(.gnu.linkonce.b.*)
*(COMMON) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
} >DATA } >DATA
. = ALIGN(4); . = ALIGN(4);
__bss_end__ = .; __bss_end__ = .;
_end = .; _end = .;
PROVIDE(end = .); PROVIDE(end = .);
/* .heap section which is used for memory allocation */ /* .heap section which is used for memory allocation */
.heap (NOLOAD) : .heap (NOLOAD) :
{ {
__heap_start__ = .; __heap_start__ = .;
*(.heap) *(.heap)
. = MAX(__heap_start__ + _HEAPSIZE , .); . = MAX(__heap_start__ + _HEAPSIZE , .);
} >DATA } >DATA
__heap_end__ = __heap_start__ + SIZEOF(.heap); __heap_end__ = __heap_start__ + SIZEOF(.heap);
/* .stack section - user mode stack */ /* .stack section - user mode stack */
.stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) : .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_start__ = .; __stack_start__ = .;
*(.stack) *(.stack)
. = MAX(__stack_start__ + _STACKSIZE , .); . = MAX(__stack_start__ + _STACKSIZE , .);
} >DATA } >DATA
__stack_end__ = __stack_start__ + SIZEOF(.stack); __stack_end__ = __stack_start__ + SIZEOF(.stack);
/* .stack_irq section */ /* .stack_irq section */
.stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) : .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_irq_start__ = .; __stack_irq_start__ = .;
*(.stack_irq) *(.stack_irq)
. = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .); . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);
} >DATA } >DATA
__stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq); __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);
/* .stack_fiq section */ /* .stack_fiq section */
.stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) : .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_fiq_start__ = .; __stack_fiq_start__ = .;
*(.stack_fiq) *(.stack_fiq)
. = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .); . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);
} >DATA } >DATA
__stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq); __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);
/* .stack_svc section */ /* .stack_svc section */
.stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) : .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_svc_start__ = .; __stack_svc_start__ = .;
*(.stack_svc) *(.stack_svc)
. = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .); . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);
} >DATA } >DATA
__stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc); __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);
/* .stack_abt section */ /* .stack_abt section */
.stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) : .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_abt_start__ = .; __stack_abt_start__ = .;
*(.stack_abt) *(.stack_abt)
. = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .); . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);
} >DATA } >DATA
__stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt); __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);
/* .stack_und section */ /* .stack_und section */
.stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) : .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :
{ {
__stack_und_start__ = .; __stack_und_start__ = .;
*(.stack_und) *(.stack_und)
. = MAX(__stack_und_start__ + _STACKSIZE_UND , .); . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);
} >DATA } >DATA
__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und); __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
/* Stabs debugging sections. */ /* Stabs debugging sections. */
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) } .stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) } .stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) } .stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) } .stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) } .comment 0 : { *(.comment) }
/* DWARF debug sections. /* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */ of the section so we begin them at 0. */
/* DWARF 1 */ /* DWARF 1 */
.debug 0 : { *(.debug) } .debug 0 : { *(.debug) }
.line 0 : { *(.line) } .line 0 : { *(.line) }
/* GNU DWARF 1 extensions */ /* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) } .debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */ /* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) } .debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) } .debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */ /* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) } .debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) } .debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) } .debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) } .debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) } .debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) } .debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */ /* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) } .debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) } .debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) } .debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) } .debug_varnames 0 : { *(.debug_varnames) }
} }

498
testing/examples/STR912Test/prj/str912_rom.ld
View File

@ -1,249 +1,249 @@
/*********************************************************************************** /***********************************************************************************
* Copyright 2005 Anglia Design * Copyright 2005 Anglia Design
* This demo code and associated components are provided as is and has no warranty, * This demo code and associated components are provided as is and has no warranty,
* implied or otherwise. You are free to use/modify any of the provided * implied or otherwise. You are free to use/modify any of the provided
* code at your own risk in your applications with the expressed limitation * code at your own risk in your applications with the expressed limitation
* of liability (see below) * of liability (see below)
* *
* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY * LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR * LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* *
* Author : Spencer Oliver * Author : Spencer Oliver
* Web : www.anglia-designs.com * Web : www.anglia-designs.com
* *
***********************************************************************************/ ***********************************************************************************/
/* Stack Sizes */ /* Stack Sizes */
_STACKSIZE = 1024; _STACKSIZE = 1024;
_STACKSIZE_IRQ = 256; _STACKSIZE_IRQ = 256;
_STACKSIZE_FIQ = 0; _STACKSIZE_FIQ = 0;
_STACKSIZE_SVC = 1024; _STACKSIZE_SVC = 1024;
_STACKSIZE_ABT = 0; _STACKSIZE_ABT = 0;
_STACKSIZE_UND = 0; _STACKSIZE_UND = 0;
_HEAPSIZE = 1024; _HEAPSIZE = 1024;
/* Memory Definitions */ /* Memory Definitions */
MEMORY MEMORY
{ {
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000 DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000
} }
/* Section Definitions */ /* Section Definitions */
SECTIONS SECTIONS
{ {
/* first section is .text which is used for code */ /* first section is .text which is used for code */
.text : .text :
{ {
CREATE_OBJECT_SYMBOLS CREATE_OBJECT_SYMBOLS
KEEP(*(.vectors)) KEEP(*(.vectors))
KEEP(*(.init)) KEEP(*(.init))
*(.text .text.*) *(.text .text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
KEEP(*(.fini)) KEEP(*(.fini))
*(.gcc_except_table) *(.gcc_except_table)
} >CODE =0 } >CODE =0
. = ALIGN(4); . = ALIGN(4);
/* .ctors .dtors are used for c++ constructors/destructors */ /* .ctors .dtors are used for c++ constructors/destructors */
.ctors : .ctors :
{ {
PROVIDE(__ctors_start__ = .); PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*))) KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors)) KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .); PROVIDE(__ctors_end__ = .);
} >CODE } >CODE
.dtors : .dtors :
{ {
PROVIDE(__dtors_start__ = .); PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*))) KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors)) KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .); PROVIDE(__dtors_end__ = .);
} >CODE } >CODE
/* .rodata section which is used for read-only data (constants) */ /* .rodata section which is used for read-only data (constants) */
.rodata : .rodata :
{ {
*(.rodata .rodata.*) *(.rodata .rodata.*)
*(.gnu.linkonce.r.*) *(.gnu.linkonce.r.*)
} >CODE } >CODE
. = ALIGN(4); . = ALIGN(4);
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KEEP (*(.preinit_array)) KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .); PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .); PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*))) KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array)) KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array)) KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*))) KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .); PROVIDE_HIDDEN (__fini_array_end = .);
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/* .data section which is used for initialized data */ /* .data section which is used for initialized data */
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{ {
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*(.data .data.*) *(.data .data.*)
*(.gnu.linkonce.d.*) *(.gnu.linkonce.d.*)
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*(.fastrun .fastrun.*) *(.fastrun .fastrun.*)
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{ {
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*(.stack_und) *(.stack_und)
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} >DATA } >DATA
__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und); __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
/* Stabs debugging sections. */ /* Stabs debugging sections. */
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.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) } .stab.excl 0 : { *(.stab.excl) }
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/* DWARF debug sections. /* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning Symbols in the DWARF debugging sections are relative to the beginning
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.line 0 : { *(.line) } .line 0 : { *(.line) }
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/* DWARF 1.1 and DWARF 2 */ /* DWARF 1.1 and DWARF 2 */
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/* SGI/MIPS DWARF 2 extensions */ /* SGI/MIPS DWARF 2 extensions */
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} }