CORTEX A8: Fix broken CPU identification
This patch fixes the issue where the OMAP CPU (and possibly others) was mistaken for iMX51 and therefore had misadjusted debug base. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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@ -1013,10 +1013,11 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0)
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struct broken_cpu {
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uint32_t dbgbase;
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uint32_t apid;
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uint32_t idcode;
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uint32_t correct_dbgbase;
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char *model;
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} broken_cpus[] = {
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{ 0x80000000, 0x04770002, 0x60000000, "imx51" },
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{ 0x80000000, 0x04770002, 0x1ba00477, 0x60000000, "imx51" },
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};
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int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
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@ -1025,7 +1026,7 @@ int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
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uint32_t apselold;
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int retval;
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unsigned int i;
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uint32_t dbgbase, apid;
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uint32_t dbgbase, apid, idcode;
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/* AP address is in bits 31:24 of DP_SELECT */
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if (apsel >= 256)
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@ -1044,10 +1045,23 @@ int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
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if (retval != ERROR_OK)
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return retval;
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/* Excavate the device ID code */
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struct jtag_tap *tap = dap->jtag_info->tap;
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while (tap != NULL) {
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if (tap->hasidcode) {
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idcode = tap->idcode;
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break;
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}
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tap = tap->next_tap;
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}
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if (tap == NULL || !tap->hasidcode)
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return ERROR_OK;
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/* Some CPUs are messed up, so fixup if needed. */
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for (i = 0; i < sizeof(broken_cpus)/sizeof(struct broken_cpu); i++)
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if (broken_cpus[i].dbgbase == dbgbase &&
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broken_cpus[i].apid == apid) {
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broken_cpus[i].apid == apid &&
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broken_cpus[i].idcode == idcode) {
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LOG_WARNING("Found broken CPU (%s), trying to fixup "
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"ROM Table location from 0x%08x to 0x%08x",
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broken_cpus[i].model, dbgbase,
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