riscv-openocd/tcl/target/aduc702x.cfg

## -*- tcl -*-
##


if { [info exists CHIPNAME] } {	
   set  _CHIPNAME $CHIPNAME    
} else {	 
   set  _CHIPNAME aduc702x
}

if { [info exists ENDIAN] } {	
   set  _ENDIAN $ENDIAN    
} else {	 
  # This config file was defaulting to big endian..
   set  _ENDIAN little
}

if { [info exists CPUTAPID] } {	
   set  _CPUTAPID $CPUTAPID    
} else {	 
   set  _CPUTAPID 0x3f0f0f0f
}


jtag_nsrst_delay 200
jtag_ntrst_delay 200

# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
# Don't really need them anyways.  
reset_config none

## JTAG scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

##
## Target configuration
##
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME

# allocate the entire SRAM as working area
$_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000

## flash configuration
# only target number is needed
flash bank aduc702x 0 0 0 0 0

## If you use the watchdog, the following code makes sure that the board
## doesn't reboot when halted via JTAG.  Yes, on the older generation
## AdUC702x, timer3 continues running even when the CPU is halted.

proc watchdog_service {} {
    global watchdog_hdl
    mww 0xffff036c 0
#    puts "watchdog!!"
    set watchdog_hdl [after 500 watchdog_service]
}

$_TARGETNAME configure -event reset-halt-post {  watchdog_service }
$_TARGETNAME configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }