riscv-openocd/tcl/target/lm3s3748.cfg

# TI/Luminary Stellaris lm3s3748

if { [info exists CHIPNAME] } {	
   set  _CHIPNAME $CHIPNAME    
} else {	 
   set  _CHIPNAME lm3s3748
}

if { [info exists ENDIAN] } {	
   set  _ENDIAN $ENDIAN    
} else {	 
  # this defaults to a little endian
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3ba00477
}

# JTAG scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID

# The "lm3s" variant works around an erratum when using Rev A of "DustDevil"
# parts (third generation, includes LM3S3748).  It keeps the debug registers
# from being cleared, by using software reset not SRST; NOP on newer revs.
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN \
	-chain-position $_TARGETNAME -variant lm3s

# 8k working area at base of ram, not backed up
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000

# flash configuration -- one bank of 128K
flash bank stellaris 0 0 0 0 0