2018-09-10 09:55:32 -05:00
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# Renesas R-Car Generation 3 SOCs
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# - There are a combination of Cortex-A57s, Cortex-A53s, and Cortex-R7 for each Gen3 SOC
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# - Each SOC can boot through any of the, up to 3, core types that it has
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# e.g. H3 can boot through Cortex-A57, Cortex-A53, or Cortex-R7
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# Supported Gen3 SOCs and their cores:
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# H3: Cortex-A57 x 4, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
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# M3W: Cortex-A57 x 2, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
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# M3N: Cortex-A57 x 2, Cortex-R7 x 2 (Lock-Step)
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# V3H: Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step)
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# V3M: Cortex-A53 x 2, Cortex-R7 x 2 (Lock-Step)
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# E3: Cortex-A53 x 1, Cortex-R7 x 2 (Lock-Step)
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# D3: Cortex-A53 x 1
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# Usage:
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# There are 2 configuration options:
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# SOC: Selects the supported SOC. (Default 'H3')
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# BOOT_CORE: Selects the booting core. 'CA57', 'CA53', or 'CR7'
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# Defaults to 'CA57' if the SOC has one, else defaults to 'CA53'
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if { [info exists SOC] } {
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set _soc $SOC
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} else {
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set _soc H3
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}
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# Set configuration for each SOC and the default 'BOOT_CORE'
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switch $_soc {
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H3 {
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set _CHIPNAME r8a77950
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set _num_ca57 4
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set _num_ca53 4
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set _num_cr7 1
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set _boot_core CA57
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}
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M3W {
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set _CHIPNAME r8a77960
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set _num_ca57 2
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set _num_ca53 4
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set _num_cr7 1
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set _boot_core CA57
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}
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M3N {
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set _CHIPNAME r8a77965
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set _num_ca57 2
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set _num_ca53 4
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set _num_cr7 1
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set _boot_core CA57
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}
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2019-04-01 22:28:17 -05:00
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V3M {
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2018-09-10 09:55:32 -05:00
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set _CHIPNAME r8a77970
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set _num_ca57 0
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2019-04-01 22:28:17 -05:00
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set _num_ca53 2
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2018-09-10 09:55:32 -05:00
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set _num_cr7 1
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set _boot_core CA53
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}
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2019-04-01 22:28:17 -05:00
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V3H {
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2018-09-10 09:55:32 -05:00
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set _CHIPNAME r8a77980
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set _num_ca57 0
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2019-04-01 22:28:17 -05:00
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set _num_ca53 4
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2018-09-10 09:55:32 -05:00
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set _num_cr7 1
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set _boot_core CA53
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}
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E3 {
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set _CHIPNAME r8a77990
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set _num_ca57 0
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set _num_ca53 1
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set _num_cr7 1
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set _boot_core CA53
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}
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D3 {
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set _CHIPNAME r8a77995
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set _num_ca57 0
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set _num_ca53 1
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set _num_cr7 0
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set _boot_core CA53
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}
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default {
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2020-02-06 05:17:13 -06:00
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error "'$_soc' is invalid!"
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2018-09-10 09:55:32 -05:00
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}
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}
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# If configured, override the default 'CHIPNAME'
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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}
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# If configured, override the default 'BOOT_CORE'
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if { [info exists BOOT_CORE] } {
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set _boot_core $BOOT_CORE
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}
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x5ba00477
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}
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echo "\t$_soc - $_num_ca57 CA57(s), $_num_ca53 CA53(s), $_num_cr7 CR7(s)"
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echo "\tBoot Core - $_boot_core\n"
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set _DAPNAME $_CHIPNAME.dap
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# TAP and DAP
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
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dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
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set CA57_DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
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set CA57_CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
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set CA53_DBGBASE {0x80C10000 0x80D10000 0x80E10000 0x80F10000}
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set CA53_CTIBASE {0x80C20000 0x80D20000 0x80E20000 0x80F20000}
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set CR7_DBGBASE 0x80910000
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set CR7_CTIBASE 0x80918000
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set smp_targets ""
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proc setup_a5x {core_name dbgbase ctibase num boot} {
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global _CHIPNAME
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global _DAPNAME
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global smp_targets
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for { set _core 0 } { $_core < $num } { incr _core } {
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set _TARGETNAME $_CHIPNAME.$core_name.$_core
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set _CTINAME $_TARGETNAME.cti
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cti create $_CTINAME -dap $_DAPNAME -ap-num 1 \
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-ctibase [lindex $ctibase $_core]
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set _command "target create $_TARGETNAME aarch64 -dap $_DAPNAME \
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-ap-num 1 -dbgbase [lindex $dbgbase $_core] -cti $_CTINAME"
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if { $_core == 0 && $boot == 1 } {
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set _targets "$_TARGETNAME"
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} else {
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set _command "$_command -defer-examine"
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}
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set smp_targets "$smp_targets $_TARGETNAME"
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eval $_command
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}
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}
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proc setup_cr7 {dbgbase ctibase boot} {
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global _CHIPNAME
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global _DAPNAME
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set _TARGETNAME $_CHIPNAME.r7
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set _CTINAME $_TARGETNAME.cti
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cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -ctibase $ctibase
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set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
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-ap-num 1 -dbgbase $dbgbase"
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if { $boot == 1 } {
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set _targets "$_TARGETNAME"
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} else {
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set _command "$_command -defer-examine"
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}
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eval $_command
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}
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# Organize target list based on the boot core
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if { [string equal $_boot_core CA57] } {
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setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 1
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setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
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setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0
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} elseif { [string equal $_boot_core CA53] } {
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setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 1
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setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
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setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0
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} else {
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setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 1
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setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
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setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
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}
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2020-01-14 22:42:03 -06:00
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source [find target/renesas_rcar_reset_common.cfg]
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2018-09-10 09:55:32 -05:00
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eval "target smp $smp_targets"
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