riscv-openocd/contrib/loaders/flash/stmqspi/stmqspi_erase_check.S

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Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface - write speed up to 150 kByte/s on STM32F469I-disco (due to SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in dual 4-line mode or STM32H73BI-Disco in octal mode - tested with STM32L476G-disco (64MBit flash, 3-byte addr), STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and STM32L476G-Disco (all 128Mbit flash, 3-byte addr), STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr) STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr) STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr) STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr) - suitable cfg for Discovery boards included - limited parsing of SFDP data if flash device not hardcoded (tested only in single/quad mode as most devices either don't support SFDP at all or have empty(!) SFDP memory) - 'set' command for auto detection override (e. g. for EEPROMs) - 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.) - makefile for creation of binary loader files - tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg - tcl/board/stm32f7discovery.cfg removed as name is ambiguous (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg) - dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI with two W25Q128FV, sample cfg files included and on STM32H745I-Disco, STM32H747I-Disco, STM32H750B-Disco - read/verify/erase_check uses indirect read mode to work around silicon bug in H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last bytes causes debug interface to hang) - octospi supported only in single/dual 1-line, 2-line, 4-line and single 8-line modes, (not in hyper flash mode) Requirements: GPIOs must be initialized appropriately, and SPI flash chip be configured appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip specific, cf. included cfg files. The driver infers most parameters from current setting in CR, CCR, ... registers. Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4321 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com>
2016-12-21 03:35:58 -06:00
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m0
.thumb
.thumb_func
/* Params:
* r0 - sector count
* r1 - QSPI io_base
* Clobbered:
* r2 - r7 tmp */
#include "../../../../src/flash/nor/stmqspi.h"
.macro qspi_abort
movs r4, #(1<<SPI_ABORT) /* abort bit mask */
ldr r7, [r1, #QSPI_CR] /* get QSPI_CR register */
orrs r7, r7, r4 /* set abort bit */
str r7, [r1, #QSPI_CR] /* store new CR register */
.endm
.macro wait_busy
0:
ldr r7, [r1, #QSPI_SR] /* load status */
lsrs r7, r7, #(SPI_BUSY+1) /* shift BUSY into C */
bcs 0b /* loop until BUSY cleared */
movs r7, #(1<<SPI_TCF) /* TCF bitmask */
str r7, [r1, #QSPI_FCR] /* clear TCF flag */
.endm
start:
adr r2, buffer /* pointer to start of buffer */
movs r3, #QSPI_DR /* load QSPI_DR address offset */
add r3, r3, r1 /* address of QSPI_DR */
sector_start:
qspi_abort /* start in clean state */
ldmia r2!, {r4, r5, r6} /* load address offset, length, initial value */
subs r2, r2, #8 /* point to length */
subs r5, r5, #1 /* decrement sector length for DLR */
wait_busy
str r5, [r1, #QSPI_DLR] /* size-1 in DLR register */
ldr r7, ccr_page_read /* CCR for page read */
str r7, [r1, #QSPI_CCR] /* initiate transfer */
str r4, [r1, #QSPI_AR] /* store SPI start address */
ldr r7, [r1, #QSPI_SR] /* wait for command startup */
read_loop:
ldrb r4, [r3] /* read next byte from DR */
movs r7, #0xFF /* fill bits 8-15 */
lsls r7, r7, #8 /* with ones */
orrs r4, r4, r7 /* copy ones to left of read byte */
ands r6, r6, r4 /* and read byte to result */
lsls r4, r4, #8 /* shift result into higher byte */
orrs r6, r6, r4 /* or read byte to result */
subs r5, r5, #1 /* decrement byte (count-1) */
bpl read_loop /* again if sector not completed */
adds r5, r5, #1 /* increment count due to the -1 */
stmia r2!, {r5, r6} /* save final count and result for sector */
subs r0, r0, #1 /* decrement sector count */
bne sector_start /* next sector? */
qspi_abort /* to idle state */
.align 2 /* align to word, bkpt is 4 words */
bkpt #0 /* before code end for exit_point */
.align 2 /* align to word */
.space 4 /* not used */
ccr_page_read:
.space 4 /* QSPI_CCR value for read command */
.space 4 /* not used */
.space 4 /* not used */
.equ buffer, .