57 lines
1.5 KiB
INI
57 lines
1.5 KiB
INI
|
#
|
||
|
|
# Texas Instruments CC26x0 - ARM Cortex-M3
|
||
|
|
#
|
||
|
|
# http://www.ti.com
|
||
|
|
#
|
||
|
|
||
|
|
source [find target/icepick.cfg]
|
||
|
|
source [find target/ti-cjtag.cfg]
|
||
|
|
|
||
|
|
if { [info exists CHIPNAME] } {
|
||
|
|
set _CHIPNAME $CHIPNAME
|
||
|
|
} else {
|
||
|
|
set _CHIPNAME cc26x0
|
||
|
|
}
|
||
|
|
|
||
|
|
#
|
||
|
|
# Main DAP
|
||
|
|
#
|
||
|
|
if { [info exists DAP_TAPID] } {
|
||
|
|
set _DAP_TAPID $DAP_TAPID
|
||
|
|
} else {
|
||
|
|
set _DAP_TAPID 0x4BA00477
|
||
|
|
}
|
||
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
|
||
|
|
jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
|
||
|
|
|
||
|
|
#
|
||
|
|
# ICEpick-C (JTAG route controller)
|
||
|
|
#
|
||
|
|
if { [info exists JRC_TAPID] } {
|
||
|
|
set _JRC_TAPID $JRC_TAPID
|
||
|
|
} else {
|
||
|
|
set _JRC_TAPID 0x0B99A02F
|
||
|
|
}
|
||
|
|
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
|
||
|
|
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
|
||
|
|
# A start sequence is needed to change from 2-pin cJTAG to 4-pin JTAG
|
||
|
|
jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
|
||
|
|
|
||
|
|
set _TARGETNAME $_CHIPNAME.cpu
|
||
|
|
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
|
||
|
|
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
|
||
|
|
|
||
|
|
if { [info exists WORKAREASIZE] } {
|
||
|
|
set _WORKAREASIZE $WORKAREASIZE
|
||
|
|
} else {
|
||
|
|
set _WORKAREASIZE 0x4000
|
||
|
|
}
|
||
|
|
|
||
|
|
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||
|
|
|
||
|
|
set _FLASHNAME $_CHIPNAME.flash
|
||
|
|
flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME
|
||
|
|
|
||
|
|
reset_config srst_only
|
||
|
|
adapter_nsrst_delay 100
|