riscv-openocd/tcl/target/dsp568037.cfg

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# Script for freescale DSP568037
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME dsp568037
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# this defaults to a big endian
set _ENDIAN little
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x01f2801d
}
#jtag speed
adapter speed 800
reset_config srst_only
#MASTER tap
jtag newtap $_CHIPNAME chp -irlen 8 -ircapture 1 -irmask 0x03 -expected-id $_CPUTAPID
#CORE tap
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x03 -disable -expected-id 0x02211004
#target configuration - There is only 1 tap at a time, hence only 1 target is defined.
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME
# Setup the interesting tap
jtag configure $_CHIPNAME.chp -event setup "jtag tapenable $_TARGETNAME"
#select CORE tap by modifying the TLM register.
#to be used when MASTER tap is selected.
jtag configure $_TARGETNAME -event tap-enable "
irscan $_CHIPNAME.chp 0x05;
drscan $_CHIPNAME.chp 4 0x02;
jtag tapdisable $_CHIPNAME.chp;
"
#select MASTER tap by modifying the TLM register.
#to be used when CORE tap is selected.
jtag configure $_CHIPNAME.chp -event tap-enable "
irscan $_TARGETNAME 0x08;
drscan $_TARGETNAME 4 0x1;
jtag tapdisable $_TARGETNAME;
"
#disables the master tap
jtag configure $_TARGETNAME -event tap-disable "
"
#TODO FIND SMARTER WAY.
jtag configure $_CHIPNAME.chp -event tap-disable "
"
#TODO FIND SMARTER WAY.
#working area at base of ram
$_TARGETNAME configure -work-area-virt 0
#setup flash
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME