2019-01-16 18:00:34 -06:00
|
|
|
#
|
2015-11-27 17:28:16 -06:00
|
|
|
# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
|
2019-01-16 18:00:34 -06:00
|
|
|
#
|
|
|
|
|
|
|
|
# Evaluation boards by Analog Devices (and designs derived from them) use a
|
|
|
|
# non-standard 10-pin 0.05" ARM Cortex Debug Connector. In this bastardized
|
|
|
|
# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
|
|
|
|
#
|
|
|
|
# As a result, a standards-compliant debug pod will force /TRST active,
|
|
|
|
# putting the processor's debug interface into reset and preventing usage.
|
|
|
|
#
|
|
|
|
# A connector adapter must be employed on these boards to isolate or remap
|
|
|
|
# /TRST so that it is only asserted when intended.
|
2015-11-27 17:28:16 -06:00
|
|
|
|
|
|
|
source [find target/swj-dp.tcl]
|
|
|
|
|
|
|
|
if { [info exists CHIPNAME] } {
|
|
|
|
set _CHIPNAME $CHIPNAME
|
|
|
|
} else {
|
|
|
|
set _CHIPNAME ADSP-SC58x
|
|
|
|
}
|
|
|
|
|
|
|
|
if { [info exists ENDIAN] } {
|
|
|
|
set _ENDIAN $ENDIAN
|
|
|
|
} else {
|
|
|
|
set _ENDIAN little
|
|
|
|
}
|
|
|
|
|
|
|
|
if { [info exists CPUTAPID] } {
|
|
|
|
set _CPUTAPID $CPUTAPID
|
|
|
|
} else {
|
|
|
|
set _CPUTAPID 0x3BA02477
|
|
|
|
}
|
|
|
|
|
2019-01-16 18:00:34 -06:00
|
|
|
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
2018-03-23 15:17:29 -05:00
|
|
|
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
|
2015-11-27 17:28:16 -06:00
|
|
|
|
2019-01-16 18:00:34 -06:00
|
|
|
target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
|
|
|
|
|
2015-11-27 17:28:16 -06:00
|
|
|
set _TARGETNAME $_CHIPNAME.cpu
|
2018-03-23 15:17:29 -05:00
|
|
|
target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
|
2015-11-27 17:28:16 -06:00
|
|
|
|
|
|
|
$_TARGETNAME configure -event examine-end {
|
|
|
|
global _TARGETNAME
|
2019-01-16 18:00:34 -06:00
|
|
|
sc58x_enabledebug
|
2015-11-27 17:28:16 -06:00
|
|
|
}
|
|
|
|
|
2019-01-16 18:00:34 -06:00
|
|
|
proc sc58x_enabledebug {} {
|
|
|
|
# Enable debugging functionality by setting bits in the TAPC_DBGCTL register
|
|
|
|
# it is not possible to halt the target unless these bits have been set
|
|
|
|
ap0.mem mww 0x31131000 0xFFFF
|
2015-11-27 17:28:16 -06:00
|
|
|
}
|
|
|
|
|