riscv-openocd/tcl/target/em357.cfg

#
# Target configuration for the Silicon Labs EM357 chips
#

#
# em357 family supports JTAG and SWD transports
#
source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME em357
}

# Work-area is a space in RAM used for flash programming
# By default use 4kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x1000
}

if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   if { [using_jtag] } {
      set _CPUTAPID 0x3ba00477
   } else {
      set _CPUTAPID 0x1ba00477
   }
}

if { [info exists BSTAPID] } {
   set _BSTAPID $BSTAPID
} else {
  set _BSTAPID 0x069a962b
}

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME em358
}

if { [info exists FLASHSIZE] } {
    set _FLASHSIZE $FLASHSIZE
} else {
    set _FLASHSIZE 0x30000
}

swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
if { [using_jtag] } {
    swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
}

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME

if { ![using_hla]} {
# according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
# There is a bug in the chip, which means that when using external debuggers the chip
# may lock up in certain CPU clock modes. Affected modes are operating the CPU at
# 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
# oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
# require a pin reset or power cycle.
#
# for details, refer to:
# http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
    cortex_m reset_config vectreset
}