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riscv-openocd/tcl/target/ti-cjtag.cfg

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tcl/target: add SPDX tag For historical reasons, no license information was added to the tcl files. This makes trivial adding the SPDX tag through script: fgrep -rL SPDX tcl/ target| while read a;do \ sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n }' $a;done With no specific license information from the author, let's extend the OpenOCD project license GPL-2.0-or-later to the files. Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7027 Tested-by: jenkins
2022-06-12 16:42:27 -05:00
# SPDX-License-Identifier: GPL-2.0-or-later
tcl/target: add CC2538 and CC26xx target files (with cJTAG procedure) Added support for the Cortex-M3 based TI low power RF SoC CC2538 and the CC26xx family. These chips need a start sequence for switching from cJTAG to JTAG before being used with OpenOCD, this is done in the tcl proc ti_cjtag_to_4pin_jtag in the ti-cjtag.cfg config. The configs for CC2538 and CC26xx run the start sequence on post-reset event and set the ICEPick IDCODE in the data register for OpenOCD to read, this is done so that every time OpenOCD resets the device, it will enable JTAG. Change-Id: I7db620211c0e7e03fad59d24fe31d23a9cdcfedc Signed-off-by: Jacob Palsson <jaaacke@gmail.com> Reviewed-on: http://openocd.zylin.com/2232 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-07-29 07:36:40 -05:00
# A start sequence to change from cJTAG to 4-pin JTAG
# This is needed for CC2538 and CC26xx to be able to communicate through JTAG
# Read section 6.3 in http://www.ti.com/lit/pdf/swru319 for more information.
proc ti_cjtag_to_4pin_jtag {jrc} {
# Bypass
target/ti-cjtag: make switching to JTAG more reliable The current cJTAG to JTAG switching commands for TI chips are not particularly reliable, especially on chips with accurate timing. On a Raspberry Pi the existing sequence has (depending on cabling and chip) a ~50% chance of working, on a much better-behaved FT2232H it doesn't manage to enable full JTAG at all. This change runs a bunch of test-idle cycles before actually attempting to switch to full JTAG. This makes the switch reliable even at high clock speeds (>100kHz) and from precise sources like the FT2232H. Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db Reported-by: Phil Wiggum <p1mail2015@mail.com> Fixes: https://sourceforge.net/p/openocd/tickets/375/ Signed-off-by: Lorenz Brun <lorenz@brun.one> Reviewed-on: https://review.openocd.org/c/openocd/+/7419 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-23 20:56:22 -06:00
runtest 20
tcl/target: add CC2538 and CC26xx target files (with cJTAG procedure) Added support for the Cortex-M3 based TI low power RF SoC CC2538 and the CC26xx family. These chips need a start sequence for switching from cJTAG to JTAG before being used with OpenOCD, this is done in the tcl proc ti_cjtag_to_4pin_jtag in the ti-cjtag.cfg config. The configs for CC2538 and CC26xx run the start sequence on post-reset event and set the ICEPick IDCODE in the data register for OpenOCD to read, this is done so that every time OpenOCD resets the device, it will enable JTAG. Change-Id: I7db620211c0e7e03fad59d24fe31d23a9cdcfedc Signed-off-by: Jacob Palsson <jaaacke@gmail.com> Reviewed-on: http://openocd.zylin.com/2232 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-07-29 07:36:40 -05:00
irscan $jrc 0x3f -endstate RUN/IDLE
# Two zero bit scans and a one bit drshift
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRUPDATE RUN/IDLE
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRUPDATE RUN/IDLE
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DREXIT1 DRUPDATE RUN/IDLE
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
# A two bit drhift and a 9 bit drshift
pathmove DRPAUSE DREXIT2 DRSHIFT DRSHIFT DREXIT1 DRUPDATE RUN/IDLE
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DRSHIFT DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DRSHIFT DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DRSHIFT DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DRSHIFT DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRSHIFT DREXIT1 DRPAUSE
pathmove DRPAUSE DREXIT2 DRUPDATE RUN/IDLE
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
# Bypass
irscan $jrc 0x3f -endstate RUN/IDLE
# Set ICEPick IDCODE in data register
irscan $jrc 0x04 -endstate RUN/IDLE
}