riscv-openocd/tcl/target/nds32v5.cfg

# SPDX-License-Identifier: GPL-2.0-or-later
#
# Andes Core
#
# http://www.andestech.com
#

set _CHIPNAME nds
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563D

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
tcl: Add support for NDS V5 target and xc7/Corvette-F1 The "Corvette-F1" is an Arduino-compatible evaluation platform, which fully supports AndesCore. The board has FTDI FT2232 to connected to FPGA's JTAG interface. The "ADP-XC7KFF676" is a development and prototyping board that provides capacity for evaluation of AndesCore processors. It works with AICE in-circuit debugging tools. This patch also include target/nds32v5.cfg to support AndesCore N22/N25F and AndeShape Platform AE250. Change-Id: I144d5063d5086d00ec44634a5028b5ea5d2eba33 Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/5338 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> 2019-10-29 00:36:31 -05:00			`# SPDX-License-Identifier: GPL-2.0-or-later`
			`#`
			`# Andes Core`
			`#`
			`# http://www.andestech.com`
			`#`

			`set _CHIPNAME nds`
			`jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563D`

			`set _TARGETNAME $_CHIPNAME.cpu`
			`target create $_TARGETNAME riscv -chain-position $_TARGETNAME`