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riscv-openocd/tcl/target/imx6.cfg

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cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
# Freescale i.MX6 series single/dual/quad core processor
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
# System JTAG Controller
if { [info exists SJC_TAPID] } {
target/imx6: Fix typo in setting _SJC_TAPID from SJC_TAPID variable The set command was missing the $ prefix on the SJC_TAPID variable and so would fail if SJC_TAPID was set Change-Id: Ib9af58f5188bd8a2bc3f888309f203d624476c27 Signed-off-by: Alex Murray <alex.murray@cohdawireless.com> Reviewed-on: http://openocd.zylin.com/1811 Tested-by: jenkins Reviewed-by: Jens Bauer <jens@gpio.dk> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-11-19 16:47:04 -06:00
set _SJC_TAPID $SJC_TAPID
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
} else {
set _SJC_TAPID 0x0191c01d
}
set _SJC_TAPID2 0x2191c01d
imx6: add new id for SJC as found on i.MX6D Austriancoder on IRC reports getting this ID on his board. Change-Id: Ie859f0ee422e18fdb94bf817cdd2b41d15b968da Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1533 Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-30 03:49:08 -05:00
set _SJC_TAPID3 0x2191e01d
tcl/target/imx6: add yet another SJC tapid This is for mx6q TO1.1. Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698 Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2253 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-08-15 11:34:35 -05:00
set _SJC_TAPID4 0x1191c01d
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
imx6: add new id for SJC as found on i.MX6D Austriancoder on IRC reports getting this ID on his board. Change-Id: Ie859f0ee422e18fdb94bf817cdd2b41d15b968da Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1533 Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-30 03:49:08 -05:00
-expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \
tcl/target/imx6: add yet another SJC tapid This is for mx6q TO1.1. Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698 Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2253 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-08-15 11:34:35 -05:00
-expected-id $_SJC_TAPID3 -expected-id $_SJC_TAPID4
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
# GDB target: Cortex-A9, using DAP, configuring only one core
# Base addresses of cores:
# core 0 - 0x82150000
# core 1 - 0x82152000
# core 2 - 0x82154000
# core 3 - 0x82156000
set _TARGETNAME $_CHIPNAME.cpu.0
targets: fix target_type name for Cortex-A targets Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-23 06:20:45 -05:00
target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
-coreid 0 -dbgbase 0x82150000
# some TCK cycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
proc imx6_dbginit {target} {
Fix spelling of ARM Cortex It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-14 13:21:49 -05:00
# General Cortex-A8/A9 debug initialisation
targets: fix target_type name for Cortex-A targets Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-23 06:20:45 -05:00
cortex_a dbginit
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
}
# Slow speed to be sure it will work
Remove jtag_rclk from target configs Some boards might have RCLK omitted from the JTAG connector and if the interface claims support for it, OpenOCD will end up trying to use RCLK while it's actually impossible. This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch. Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1695 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2013-10-13 10:15:24 -05:00
adapter_khz 1000
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-07 18:12:49 -06:00
$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
$_TARGETNAME configure -event gdb-attach { halt }