22 lines
683 B
INI
22 lines
683 B
INI
|
# !!!!!!!!!!!!
|
||
|
|
# ! UNTESTED !
|
||
|
|
# !!!!!!!!!!!!
|
||
|
|
|
||
|
|
# NXP LPC1763 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM,
|
||
|
|
set CHIPNAME lpc1763
|
||
|
|
set CPUTAPID 0x4ba00477
|
||
|
|
set CPURAMSIZE 0x8000
|
||
|
|
set CPUROMSIZE 0x40000
|
||
|
|
|
||
|
|
# After reset the chip is clocked by the ~4MHz internal RC oscillator.
|
||
|
|
# When board-specific code (reset-init handler or device firmware)
|
||
|
|
# configures another oscillator and/or PLL0, set CCLK to match; if
|
||
|
|
# you don't, then flash erase and write operations may misbehave.
|
||
|
|
# (The ROM code doing those updates cares about core clock speed...)
|
||
|
|
#
|
||
|
|
# CCLK is the core clock frequency in KHz
|
||
|
|
set CCLK 4000
|
||
|
|
|
||
|
|
#Include the main configuration file.
|
||
|
|
source [find target/lpc17xx.cfg];
|