riscv-openocd/tcl/target/imx7.cfg

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME imx7
}

# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
        set _DAP_TAPID $DAP_TAPID
} else {
        set _DAP_TAPID 0x5ba00477
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
        -expected-id $_DAP_TAPID

#
# Cortex-A7 target
#
# GDB target: Cortex-A7, using DAP, configuring only one core
# Base addresses of cores:
# core 0  -  0x80070000
# core 1  -  0x80072000
set _TARGETNAME $_CHIPNAME.cpu_a7

dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

target create $_TARGETNAME.0 cortex_a -dap $_CHIPNAME.dap \
        -coreid 0 -dbgbase 0x80070000

target create $_TARGETNAME.1 cortex_a -dap $_CHIPNAME.dap \
        -coreid 1 -dbgbase 0x80072000 -defer-examine
#
# Cortex-M4 target
#
set _TARGETNAME_2 $_CHIPNAME.cpu_m4
target create $_TARGETNAME_2 cortex_m -dap $_CHIPNAME.dap -ap-num 4 \
        -defer-examine

targets $_TARGETNAME.0