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riscv-openocd/src/target/arm946e.h

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arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2010 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
#ifndef ARM946E_H
#define ARM946E_H
#include "arm9tdmi.h"
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
#define ARM946E_COMMON_MAGIC 0x20f920f9
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
struct arm946e_common {
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
struct arm7_9_common arm7_9_common;
int common_magic;
uint32_t cp15_control_reg;
};
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
static inline struct arm946e_common *target_to_arm946(struct target *target)
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
{
return container_of(target->arch_info, struct arm946e_common,
cleanup: rename armv4_5 to arm for readability Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-19 04:06:37 -06:00
arm7_9_common.arm);
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
}
int arm946e_init_arch_info(struct target *target,
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
struct arm946e_common *arm946e, struct jtag_tap *tap);
arm964e: Add support for ARM946E target. So far most of the people have been using existing ARM966E in the place of ARM946E, because they have practically the same scan chains. However, ARM946E has caches, which further complicates JATG handling via scan-chain. this was preventing single-stepping for ARM946E when SW breakpoints are used. This patch thus introduces : 1) Correct cache handling on memory write 2) Possibility to flush whole cache and turn it off during debug, or just to flush affected lines (faster and better) 3) Correct SW breakpoint handling and correct single-stepping 4) Corrects the bug on CP15 read and write, so CP15 values are now correctly R/W
2010-11-04 08:33:10 -05:00
int arm946e_write_cp15(struct target *target, int reg_addr, uint32_t value);
extern const struct command_registration arm946e_command_handlers[];
build: cleanup src/target directory Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-02-05 06:03:04 -06:00
#endif /* ARM946E_H */