riscv-openocd/src/pld/Makefile.am

INCLUDES = -I$(top_srcdir)/src/server -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag $(all_includes)
METASOURCES = AUTO
noinst_LIBRARIES = libpld.a
noinst_HEADERS = pld.h xilinx_bit.h virtex2.h
libpld_a_SOURCES = pld.c xilinx_bit.c virtex2.c
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60 2006-11-22 07:03:10 -06:00			`INCLUDES = -I$(top_srcdir)/src/server -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag $(all_includes)`
			`METASOURCES = AUTO`
			`noinst_LIBRARIES = libpld.a`
			`noinst_HEADERS = pld.h xilinx_bit.h virtex2.h`
			`libpld_a_SOURCES = pld.c xilinx_bit.c virtex2.c`