67 lines
2.1 KiB
INI
67 lines
2.1 KiB
INI
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#
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# Texas Instruments DaVinci family: TMS320DM6446
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME dm6446
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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#
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# For now, expect EMU0/EMU1 jumpered LOW (not TI's default) so ARM and ETB
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# are enabled without making ICEpick route ARM and ETB into the JTAG chain.
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#
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# Also note: when running without RTCK before the PLLs are set up, you
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# may need to slow the JTAG clock down quite a lot (under 2 MHz).
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#
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# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
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if { [info exists ETB_TAPID ] } {
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set _ETB_TAPID $ETB_TAPID
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} else {
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set _ETB_TAPID 0x2b900f0f
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}
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jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_ETB_TAPID
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# Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
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if { [info exists CPU_TAPID ] } {
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set _CPU_TAPID $CPU_TAPID
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} else {
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set _CPU_TAPID 0x07926001
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}
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jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU_TAPID
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# Subsidiary TAP: C64x+ DSP ... NOT CURRENTLY INCLUDED, must add via ICEpick.
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# Documentation for DSP JTAG interfaces evidently needs NDAs.
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# Primary TAP: ICEpick (JTAG route controller) and boundary scan
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if { [info exists JRC_TAPID ] } {
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set _JRC_TAPID $JRC_TAPID
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} else {
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set _JRC_TAPID 0x0b70002f
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}
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jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
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# GDB target: the ARM, using SRAM1 for scratch. SRAM0 (also 8K)
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# and the ETB memory (4K) are other options, while trace is unused.
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set _TARGETNAME $_CHIPNAME.arm
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x0000a000 -work-area-size 0x2000 -work-area-backup 0
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arm7_9 dbgrq enable
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads enable
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# trace setup
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# FIXME we ought to be able to say "... config $_TARGETNAME ..."
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# (not "config 0") facilitating additional targets (e.g. other chips)
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etm config 0 16 normal full etb
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etb config 0 $_CHIPNAME.etb
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