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riscv-openocd/tcl/target/bcm281xx.cfg

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bcm281xx: Add bcm281xx SoC and bcm28155_ap board Add support for Broadcom's dual A9 mobile SoC and its reference board. Change-Id: Ia145b120043bddc89c44726066023154ae390788 Signed-off-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-on: http://openocd.zylin.com/1926 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-02 15:26:26 -06:00
# BCM281xx
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME bcm281xx
}
# Main CPU DAP
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dap -expected-id $_DAP_TAPID -irlen 4
Fix spelling of ARM Cortex It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-14 13:21:49 -05:00
# Dual Cortex-A9
bcm281xx: Add bcm281xx SoC and bcm28155_ap board Add support for Broadcom's dual A9 mobile SoC and its reference board. Change-Id: Ia145b120043bddc89c44726066023154ae390788 Signed-off-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-on: http://openocd.zylin.com/1926 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-02 15:26:26 -06:00
set _TARGETNAME0 $_CHIPNAME.cpu0
set _TARGETNAME1 $_CHIPNAME.cpu1
target create $_TARGETNAME0 cortex_a -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x3fe10000
target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap -coreid 1 -dbgbase 0x3fe12000
target smp $_TARGETNAME0 $_TARGETNAME1
$_TARGETNAME0 configure -event gdb-attach {
cortex_a dbginit
}
$_TARGETNAME1 configure -event gdb-attach {
cortex_a dbginit
}