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riscv-openocd/tcl/target/lpc4350.cfg

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Add new configuration files for the Diolan LPC-4350-DB1 development board with the NXP LPC4350 processor. Change-Id: I0843e96af9ca05d3e598e2e16eb19fc0581ab46d Signed-off-by: Jim Norris <u17263@att.net> Reviewed-on: http://openocd.zylin.com/501 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-01 21:08:54 -06:00
adapter_khz 500
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc4350
}
#
# M4 JTAG mode TAP
#
if { [info exists M4_JTAG_TAPID] } {
set _M4_JTAG_TAPID $M4_JTAG_TAPID
} else {
set _M4_JTAG_TAPID 0x4ba00477
}
#
# M4 SWD mode TAP
#
if { [info exists M4_SWD_TAPID] } {
set _M4_SWD_TAPID $M4_SWD_TAPID
} else {
set _M4_SWD_TAPID 0x2ba01477
}
#
# M0 TAP
#
if { [info exists M0_JTAG_TAPID] } {
set _M0_JTAG_TAPID $M0_JTAG_TAPID
} else {
set _M0_JTAG_TAPID 0x0ba01477
}
jtag newtap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_M4_JTAG_TAPID
jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_M0_JTAG_TAPID
target: rename cortex_m3 to cortex_m Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-02-01 09:34:51 -06:00
target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
cfg: update for target's that support cortex_m AIRCR SYSRESETREQ If the target supports SYSRESETREQ make sure we use that as the default if srst is not fitted/configured. Change-Id: I24c907493134506320e69c1218702930629c1cdc Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/792 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-23 15:03:29 -05:00
Change reset configuration. This patch change the default reset config from SYSRESETREQ to the working VECTRESET. Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/1186 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-27 07:01:21 -06:00
# on this CPU we should use VECTRESET to perform a soft reset and
# manually reset the periphery
# SRST or SYSRESETREQ disable the debug interface for the time of
# the reset and will not fit our requirements for a consistent debug
# session
target: rename cortex_m3 to cortex_m Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-02-01 09:34:51 -06:00
cortex_m reset_config vectreset