2009-04-03 03:16:47 -05:00
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# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal
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2009-09-21 13:48:22 -05:00
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if { [info exists CHIPNAME] } {
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2009-04-03 03:16:47 -05:00
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2103
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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2009-09-21 13:48:22 -05:00
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set _CPUTAPID 0x4f1f0f0f
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2009-04-03 03:16:47 -05:00
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}
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# LPC2000 -> SRST causes TRST
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reset_config trst_and_srst srst_pulls_trst
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2009-05-23 19:16:04 -05:00
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# reset delays
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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2009-04-03 03:16:47 -05:00
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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2009-09-04 00:17:03 -05:00
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set _TARGETNAME $_CHIPNAME.cpu
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2009-04-03 03:16:47 -05:00
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
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# 8kB of internal SRAM
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0
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# 32kB of internal Flash, core clocked with 12MHz crystal
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# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
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flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum
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