2010-01-29 02:46:11 -06:00
< html >
< head >
< title > Test results for version 1.62< / title >
< / head >
< body >
< H1 > STR710< / H1 >
< H2 > Connectivity< / H2 >
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > Interface< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "CON001" / > CON001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Telnet connection< / td >
< td > Power on, jtag target attached< / td >
< td > On console, type< br > < code > telnet ip port< / code > < / td >
< td > < code > Open On-Chip Debugger< br > >< / code > < / td >
< td > < code > > telnet 10.0.0.142< br >
Trying 10.0.0.142...< br >
Connected to 10.0.0.142.< br >
Escape character is '^]'.< br >
Open On-Chip Debugger< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "CON002" / > CON002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > GDB server connection< / td >
< td > Power on, jtag target attached< / td >
< td > On GDB console, type< br > < code > target remote ip:port< / code > < / td >
< td > < code > Remote debugging using 10.0.0.73:3333< / code > < / td >
< td > < code >
(gdb) tar remo 10.0.0.142:3333< br >
Remote debugging using 10.0.0.142:3333< br >
0x00016434 in ?? ()< br >
(gdb)
< / code > < / td >
< td > PASS< / td >
< / tr >
< / table >
< H2 > Reset< / H2 >
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > Interface< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "RES001" / > RES001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Reset halt on a blank target< / td >
< td > Erase all the content of the flash< / td >
< td > Connect via the telnet interface and type < br > < code > reset halt< / code > < / td >
< td > Reset should return without error and the output should contain< br > < code > target state: halted< / code > < / td >
< td >
< code >
> mdw 0 32< br >
0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e< br >
0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292< br >
0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18< br >
0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8< br >
> reset< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
>< br >
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RES002" / > RES002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Reset init on a blank target< / td >
< td > Erase all the content of the flash< / td >
< td > Connect via the telnet interface and type < br > < code > reset init< / code > < / td >
< td > Reset should return without error and the output should contain < br > < code > executing reset script 'name_of_the_script'< / code > < / td >
< td >
< code >
> reset init< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Undefined instruction< br >
cpsr: 0xf00000db pc: 0x00000004< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RES003" / > RES003< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Reset after a power cycle of the target< / td >
< td > Reset the target then power cycle the target< / td >
< td > Connect via the telnet interface and type < br > < code > reset halt< / code > after the power was detected< / td >
< td > Reset should return without error and the output should contain< br > < code > target state: halted< / code > < / td >
< td >
< code >
nsed power dropout.< br >
nsed power dropout.< br >
nsed nSRST deasserted.< br >
invalid mode value encountered 0< br >
cpsr contains invalid mode value - communication failure< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x100000d3 pc: 0x0000001c< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz< br >
nsed power restore.< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x500000d3 pc: 0x00000000< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz< br >
> reset init< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x500000d3 pc: 0x00000000< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RES004" / > RES004< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Reset halt on a blank target where reset halt is supported< / td >
< td > Erase all the content of the flash< / td >
< td > Connect via the telnet interface and type < br > < code > reset halt< / code > < / td >
< td > Reset should return without error and the output should contain< br > < code > target state: halted< / code > < / td >
< td >
< code >
> reset halt< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x200000d3 pc: 0xfe50cba4< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RES005" / > RES005< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Reset halt on a blank target using return clock< / td >
< td > Erase all the content of the flash, set the configuration script to use RCLK< / td >
< td > Connect via the telnet interface and type < br > < code > reset halt< / code > < / td >
< td > Reset should return without error and the output should contain< br > < code > target state: halted< / code > < / td >
< td >
< code >
> jtag_khz 0< br >
RCLK - adaptive< br >
RCLK timeout< br >
RCLK timeout< br >
RCLK timeout< br >
> reset halt< br >
RCLK timeout< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x200000d3 pc: 0xfe50cb50< br >
< / code >
< / td >
< td > < font color = red > < b > FAIL< / b > < / font > < / td >
< / tr >
< / table >
< H2 > JTAG Speed< / H2 >
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > ZY1000< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "SPD001" / > SPD001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 16MHz on normal operation< / td >
< td > Reset init the target according to RES002 < / td >
< td > Change speed and exercise a memory access over the JTAG, for example < br > < code > mdw 0x0 32< / code > < / td >
< td > The command should run without any errors. If any JTAG checking errors happen, the test failed< / td >
< td >
< code >
> jtag_khz 16000< br >
jtag_speed 4 => JTAG clk=16.000000< br >
16000 kHz< br >
> mdw 0 32< br >
0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e< br >
0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292< br >
0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18< br >
0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "SPD002" / > SPD002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 8MHz on normal operation< / td >
< td > Reset init the target according to RES002 < / td >
< td > Change speed and exercise a memory access over the JTAG, for example < br > < code > mdw 0x0 32< / code > < / td >
< td > The command should run without any errors. If any JTAG checking errors happen, the test failed< / td >
< td >
< code >
> jtag_khz 8000< br >
jtag_speed 8 => JTAG clk=8.000000< br >
8000 kHz< br >
> mdw 0 32< br >
0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e< br >
0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292< br >
0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18< br >
0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "SPD003" / > SPD003< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 4MHz on normal operation< / td >
< td > Reset init the target according to RES002 < / td >
< td > Change speed and exercise a memory access over the JTAG, for example < br > < code > mdw 0x0 32< / code > < / td >
< td > The command should run without any errors. If any JTAG checking errors happen, the test failed< / td >
< td >
< code >
> jtag_khz 4000< br >
jtag_speed 16 => JTAG clk=4.000000< br >
4000 kHz< br >
> mdw 0 32< br >
0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e< br >
0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292< br >
0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18< br >
0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "SPD004" / > SPD004< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 2MHz on normal operation< / td >
< td > Reset init the target according to RES002 < / td >
< td > Change speed and exercise a memory access over the JTAG, for example < br > < code > mdw 0x0 32< / code > < / td >
< td > The command should run without any errors. If any JTAG checking errors happen, the test failed< / td >
< td >
< code >
> > jtag_khz 2000< br >
jtag_speed 32 => JTAG clk=2.000000< br >
2000 kHz< br >
> mdw 0 32< br >
0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e< br >
0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292< br >
0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18< br >
0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "SPD005" / > SPD005< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > RCLK on normal operation< / td >
< td > Reset init the target according to RES002 < / td >
< td > Change speed and exercise a memory access over the JTAG, for example < br > < code > mdw 0x0 32< / code > < / td >
< td > The command should run without any errors. If any JTAG checking errors happen, the test failed< / td >
< td >
< code >
> jtag_khz 0< br >
RCLK - adaptive< br >
RCLK timeout< br >
RCLK timeout< br >
RCLK timeout
< / code >
< / td >
< td > < font color = red > < b > FAIL< / b > < / font > < / td >
< / tr >
< / table >
< H2 > Debugging< / H2 >
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > Interface< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "DBG001" / > DBG001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Load is working< / td >
< td > Reset init is working, RAM is accesible, GDB server is started< / td >
< td > On the console of the OS: < br >
< code > arm-elf-gdb test_ram.elf< / code > < br >
< code > (gdb) target remote ip:port< / code > < br >
< code > (gdb) load< / load >
< / td >
< td > Load should return without error, typical output looks like:< br >
< code >
Loading section .text, size 0x14c lma 0x0< br >
Start address 0x40, load size 332< br >
Transfer rate: 180 bytes/sec, 332 bytes/write.< br >
< / code >
< / td >
< td > < code >
(gdb) load< br >
Loading section .text, size 0x1cc lma 0x20000000< br >
Loading section .vectors, size 0x40 lma 0x200001cc< br >
Loading section .rodata, size 0x4 lma 0x2000020c< br >
Start address 0x20000000, load size 528< br >
Transfer rate: 64 KB/sec, 176 bytes/write.< br >
(gdb)
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG002" / > DBG002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Software breakpoint< / td >
< td > Load the test_ram.elf application, use instructions from GDB001< / td >
< td > In the GDB console:< br >
< code >
(gdb) monitor gdb_breakpoint_override soft< br >
force soft breakpoints< br >
(gdb) break main< br >
Breakpoint 1 at 0xec: file src/main.c, line 71.< br >
(gdb) continue< br >
Continuing.
< / code >
< / td >
< td > The software breakpoint should be reached, a typical output looks like:< br >
< code >
target state: halted< br >
target halted in ARM state due to breakpoint, current mode: Supervisor< br >
cpsr: 0x000000d3 pc: 0x000000ec< br >
< br >
Breakpoint 1, main () at src/main.c:71< br >
71 DWORD a = 1;
< / code >
< / td >
< td >
< code >
(gdb) monitor gdb_breakpoint_override soft< br >
force soft breakpoints< br >
Current language: auto< br >
The current source language is "auto; currently asm".< br >
(gdb) break main< br >
Breakpoint 1 at 0x20000170: file src/main.c, line 69.< br >
(gdb) c< br >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
Current language: auto< br >
The current source language is "auto; currently c".< br >
(gdb)
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG003" / > DBG003< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Single step in a RAM application< / td >
< td > Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002< / td >
< td > In GDB, type < br > < code > (gdb) step< / code > < / td >
< td > The next instruction should be reached, typical output:< br >
< code >
(gdb) step< br >
target state: halted< br >
target halted in ARM state due to single step, current mode: Abort< br >
cpsr: 0x20000097 pc: 0x000000f0< br >
target state: halted< br >
target halted in ARM state due to single step, current mode: Abort< br >
cpsr: 0x20000097 pc: 0x000000f4< br >
72 DWORD b = 2;
< / code >
< / td >
< td >
< code >
(gdb) step< br >
70 DWORD b = 2;< br >
(gdb)
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG004" / > DBG004< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Software break points are working after a reset< / td >
< td > Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002< / td >
< td > In GDB, type < br > < code >
(gdb) monitor reset init< br >
(gdb) load< br >
(gdb) continue< br >
< / code > < / td >
< td > The breakpoint should be reached, typical output:< br >
< code >
target state: halted< br >
target halted in ARM state due to breakpoint, current mode: Supervisor< br >
cpsr: 0x000000d3 pc: 0x000000ec< br >
< br >
Breakpoint 1, main () at src/main.c:71< br >
71 DWORD a = 1;
< / code >
< / td >
< td > < code >
((gdb) monitor reset init< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Supervisor< br >
cpsr: 0x60000013 pc: 0x200001bc< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz< br >
(gdb) load< br >
Loading section .text, size 0x1cc lma 0x20000000< br >
Loading section .vectors, size 0x40 lma 0x200001cc< br >
Loading section .rodata, size 0x4 lma 0x2000020c< br >
Start address 0x20000000, load size 528< br >
Transfer rate: 64 KB/sec, 176 bytes/write.< br >
(gdb) c< br >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
(gdb)
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG005" / > DBG005< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Hardware breakpoint< / td >
< td > Flash the test_rom.elf application. Make this test after FLA004 has passed< / td >
< td > Be sure that < code > gdb_memory_map< / code > and < code > gdb_flash_program< / code > are enabled. In GDB, type < br >
< code >
(gdb) monitor reset init< br >
(gdb) load< br >
Loading section .text, size 0x194 lma 0x100000< br >
Start address 0x100040, load size 404< br >
Transfer rate: 179 bytes/sec, 404 bytes/write.< br >
(gdb) monitor gdb_breakpoint_override hard< br >
force hard breakpoints< br >
(gdb) break main< br >
Breakpoint 1 at 0x100134: file src/main.c, line 69.< br >
(gdb) continue< br >
< / code >
< / td >
< td > The breakpoint should be reached, typical output:< br >
< code >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
< / code >
< / td >
< td >
< code >
(gdb) monitor gdb_breakpoint_override hard< br >
force hard breakpoints< br >
(gdb) break main< br >
Breakpoint 1 at 0x40000170: file src/main.c, line 69.< br >
(gdb) c< br >
Continuing.< br >
Note: automatically using hardware breakpoints for read-only addresses.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
Current language: auto< br >
The current source language is "auto; currently c".< br >
(gdb)
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG006" / > DBG006< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Hardware breakpoint is set after a reset< / td >
< td > Follow the instructions to flash and insert a hardware breakpoint from DBG005< / td >
< td > In GDB, type < br >
< code >
(gdb) monitor reset< br >
(gdb) monitor reg pc 0x100000< br >
pc (/32): 0x00100000< br >
(gdb) continue
< / code > < br >
where the value inserted in PC is the start address of the application
< / td >
< td > The breakpoint should be reached, typical output:< br >
< code >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
< / code >
< / td >
< td >
< code >
(gdb) monitor reset init< br >
jtag_speed 6400 => JTAG clk=0.010000< br >
10 kHz< br >
JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)< br >
srst pulls trst - can not reset into halted mode. Issuing halt after reset.< br >
target state: halted< br >
target halted in ARM state due to debug-request, current mode: Undefined instruction< br >
cpsr: 0x400000db pc: 0x010aea80< br >
jtag_speed 10 => JTAG clk=6.400000< br >
6400 kHz< br >
(gdb) monitor reg pc 0x40000000< br >
pc (/32): 0x40000000< br >
(gdb) c< br >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
Current language: auto< br >
The current source language is "auto; currently c".< br >
(gdb)
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "DBG007" / > DBG007< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Single step in ROM< / td >
< td > Flash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passed< / td >
< td > Be sure that < code > gdb_memory_map< / code > and < code > gdb_flash_program< / code > are enabled. In GDB, type < br >
< code >
(gdb) monitor reset< br >
(gdb) load< br >
Loading section .text, size 0x194 lma 0x100000< br >
Start address 0x100040, load size 404< br >
Transfer rate: 179 bytes/sec, 404 bytes/write.< br >
(gdb) monitor arm7_9 force_hw_bkpts enable< br >
force hardware breakpoints enabled< br >
(gdb) break main< br >
Breakpoint 1 at 0x100134: file src/main.c, line 69.< br >
(gdb) continue< br >
Continuing.< br >
< br >
Breakpoint 1, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
(gdb) step
< / code >
< / td >
< td > The breakpoint should be reached, typical output:< br >
< code >
target state: halted< br >
target halted in ARM state due to single step, current mode: Supervisor< br >
cpsr: 0x60000013 pc: 0x0010013c< br >
70 DWORD b = 2;< br >
< / code >
< / td >
< td > < code >
Breakpoint 2, main () at src/main.c:69< br >
69 DWORD a = 1;< br >
Current language: auto< br >
The current source language is "auto; currently c".< br >
(gdb) step< br >
70 DWORD b = 2;< br >
(gdb)
< / code > < / td >
< td > PASS< / td >
< / tr >
< / table >
< H2 > RAM access< / H2 >
Note: these tests are not designed to test/debug the target, but to test functionalities!
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > Interface< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "RAM001" / > RAM001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 32 bit Write/read RAM< / td >
< td > Reset init is working< / td >
< td > On the telnet interface< br >
< code > > mww ram_address 0xdeadbeef 16< br >
> mdw ram_address 32
< / code >
< / td >
< td > The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.< br >
< code >
> mww 0x0 0xdeadbeef 16< br >
> mdw 0x0 32< br >
0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388< br >
0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388< br >
< / code >
< / td >
< td > < code >
> mww 0x20000000 0xdeadbeef 16< br >
> mdw 0x20000000 32< br >
0x20000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x20000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x20000040: e3a0020a e3a01073 e5801018 e5901008 e3110002 0afffffc e3a0020a e59f10d0< br >
0x20000060: e5801008 e321f0db e59fd0c8 e321f0d7 e59fd0c4 e321f0d1 e59fd0c0 e321f0d2< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RAM002" / > RAM002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 16 bit Write/read RAM< / td >
< td > Reset init is working< / td >
< td > On the telnet interface< br >
< code > > mwh ram_address 0xbeef 16< br >
> mdh ram_address 32
< / code >
< / td >
< td > The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.< br >
< code >
> mwh 0x0 0xbeef 16< br >
> mdh 0x0 32< br >
0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef< br >
0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000< br >
>
< / code >
< / td >
< td > < code >
> mwh 0x20000000 0xbeef 16< br >
> mdh 0x20000000 32< br >
0x20000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef< br >
0x20000020: beef dead beef dead beef dead beef dead beef dead beef dead beef dead beef dead< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "RAM003" / > RAM003< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > 8 bit Write/read RAM< / td >
< td > Reset init is working< / td >
< td > On the telnet interface< br >
< code > > mwb ram_address 0xab 16< br >
> mdb ram_address 32
< / code >
< / td >
< td > The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.< br >
< code >
> mwb ram_address 0xab 16< br >
> mdb ram_address 32< br >
0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00< br >
>
< / code >
< / td >
< td > < code >
> mwb 0x20000000 0xab 16< br >
> mdb 0x20000000 32< br >
0x20000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ef be ef be ef be ef be ef be ef be ef be ef be< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< / table >
< H2 > Flash access< / H2 >
< table border = 1 >
< tr >
< td > ID< / td >
< td > Target< / td >
< td > Interface< / td >
< td > Description< / td >
< td > Initial state< / td >
< td > Input< / td >
< td > Expected output< / td >
< td > Actual output< / td >
< td > Pass/Fail< / td >
< / tr >
< tr >
< td > < a name = "FLA001" / > FLA001< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Flash probe< / td >
< td > Reset init is working< / td >
< td > On the telnet interface:< br >
< code > > flash probe 0< / code >
< / td >
< td > The command should execute without error. The output should state the name of the flash and the starting address. An example of output:< br >
< code > flash 'ecosflash' found at 0x01000000< / code >
< / td >
< td >
< code >
> flash probe 0< br >
flash 'str7x' found at 0x40000000< br >
>
< / code >
< / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "FLA002" / > FLA002< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > flash fillw< / td >
< td > Reset init is working, flash is probed< / td >
< td > On the telnet interface< br >
< code > > flash fillw 0x1000000 0xdeadbeef 16
< / code >
< / td >
< td > The commands should execute without error. The output looks like:< br >
< code >
wrote 64 bytes to 0x01000000 in 11.610000s (0.091516 kb/s)
< / code > < br >
To verify the contents of the flash:< br >
< code >
> mdw 0x1000000 32< br >
0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
< / code >
< / td >
< td > < code >
> flash fillw 0x40000000 0xdeadbeef 16< br >
wrote 64 bytes to 0x40000000 in 0.000000s (inf kb/s)< br >
> mdw 0x40000000 32< br >
0x40000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x40000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef< br >
0x40000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x40000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "FLA003" / > FLA003< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Flash erase< / td >
< td > Reset init is working, flash is probed< / td >
< td > On the telnet interface< br >
< code > > flash erase_address 0x1000000 0x2000
< / code >
< / td >
< td > The commands should execute without error.< br >
< code >
erased address 0x01000000 length 8192 in 4.970000s
< / code >
To check that the flash has been erased, read at different addresses. The result should always be 0xff.
< code >
> mdw 0x1000000 32< br >
0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
< / code >
< / td >
< td > < code >
> flash erase_address 0x40000000 0x2000< br >
erased address 0x40000000 (length 8192) in 0.270000s (29.630 kb/s)< br >
> mdw 0x40000000 32 < br >
0x40000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x40000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x40000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
0x40000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff< br >
>
< / code > < / td >
< td > PASS< / td >
< / tr >
< tr >
< td > < a name = "FLA004" / > FLA004< / td >
< td > STR912< / td >
< td > ZY1000< / td >
< td > Loading to flash from GDB< / td >
< td > Reset init is working, flash is probed, connectivity to GDB server is working< / td >
< td > Start GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf. < br >
< code >
(gdb) target remote ip:port< br >
(gdb) monitor reset< br >
(gdb) load< br >
Loading section .text, size 0x194 lma 0x100000< br >
Start address 0x100040, load size 404< br >
Transfer rate: 179 bytes/sec, 404 bytes/write.
(gdb) monitor verify_image path_to_elf_file
< / code >
< / td >
< td > The output should look like:< br >
< code >
verified 404 bytes in 5.060000s
< / code > < br >
The failure message is something like:< br >
< code > Verify operation failed address 0x00200000. Was 0x00 instead of 0x18< / code >
< / td >
< td >
< code >
(gdb) load< br >
Loading section .text, size 0x1cc lma 0x40000000< br >
Loading section .vectors, size 0x40 lma 0x400001cc< br >
Loading section .rodata, size 0x4 lma 0x4000020c< br >
Start address 0x40000000, load size 528< br >
Transfer rate: 53 bytes/sec, 176 bytes/write.< br >
(gdb) monitor verify_image /tftp/10.0.0.194/test_rom.elf< br >
verified 528 bytes in 4.760000s (0.108 kb/s)< br >
Current language: auto< br >
The current source language is "auto; currently asm".< br >
(gdb)
< / code >
< / td >
< td > PASS< / td >
< / tr >
< / table >
< / body >
2019-05-12 05:26:46 -05:00
< / html >
