2022-06-12 16:42:27 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2015-05-30 07:26:28 -05:00
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#
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# This file was created using as references the stm32f1x.cfg and aduc702x.cfg
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#
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source [find target/swj-dp.tcl]
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# Chip name
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME aducm360
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}
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2020-04-25 18:25:32 -05:00
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# Endianness
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2015-05-30 07:26:28 -05:00
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# Eventually, the whole SRAM of ADuCM360 will be used (8kB)
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x2000
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x2ba01477
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}
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2018-03-23 15:17:29 -05:00
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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2015-05-30 07:26:28 -05:00
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# SWD/JTAG speed
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2019-08-23 08:51:00 -05:00
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adapter speed 1000
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2015-05-30 07:26:28 -05:00
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##
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## Target configuration
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##
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set _TARGETNAME $_CHIPNAME.cpu
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2018-03-23 15:17:29 -05:00
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
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2015-05-30 07:26:28 -05:00
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# allocate the working area
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME aducm360 0x00 0 0 0 $_TARGETNAME
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2019-08-23 08:51:00 -05:00
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adapter srst delay 100
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2015-05-30 07:26:28 -05:00
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cortex_m reset_config sysresetreq
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