2022-06-12 16:48:05 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2011-11-17 23:10:00 -06:00
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# Configuration for the ST SPEAr320 Evaluation board
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# EVAL_SPEAr320CPU Rev. 2.0, modified to enable SRST on JTAG connector
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# http://www.st.com/spear
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#
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# List of board modifications to enable SRST, as reported in
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# ST Application Note (FIXME: add reference).
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# - Modifications on the bottom layer:
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# 1. replace reset chip U7 with a STM6315SDW13F;
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# 2. add 0 ohm resistor R45. It is located close to JTAG connector.
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# 3. add a 10K ohm pull-up resistor on the reset wire named as
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# POWERGOOD in the schematic.
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#
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# The easier way to do modification 3, is to use a resistor in package
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# 0603 or 0402 and solder it between R15 and R45:
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# - one pad soldered with the pad of R15 connected to 3.3V (this
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# is the pad of R15 closer to R45)
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# - the other pad soldered with the nearest pad of R45.
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#
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# Date: 2011-11-18
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# Author: Antonio Borneo <borneo.antonio@gmail.com>
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# Modified boards has SRST on JTAG connector
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set BOARD_HAS_SRST 1
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2011-11-22 10:12:58 -06:00
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source [find board/spear320cpu.cfg]
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