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riscv-openocd/tcl/target/at91sam4lXX.cfg

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cfg: add initial Atmel xplained kit support These kits feature a CMSIS-DAP compliant debugger and so have been added as part of the pending support. Currently the flash drivers for the L8 and D20 are wip. One issue this implementation of CMSIS-DAP raised is that it supports 512byte HID reports, however using the current HIDAPI we have no cross platform way of querying this info. Long term we plan to add this support to HIDAPI. Change-Id: Ie8b7c871f58a099d963cd71a9f8a0105a38784e9 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1625 Tested-by: jenkins
2013-11-04 15:24:39 -06:00
# script for ATMEL sam4l, a CORTEX-M4 chip
#
source [find target/at91sam4XXX.cfg]
add support for Atmel SAM4L NOR Flash This adds a new NOR Flash driver, "at91sam4l", which supports the built-in Flash on Atmel's low-power SAM4L family of Cortex M4 MCUs. Parts and their geometry are detected automatically using the Chip ID and lookup schemes described in document 42023E–SAM–07/2013. Tested on AT91SAM4LC4CA via the SAM4L XPlained Pro development kit. Change-Id: If73499dee92cc8ce231845244ea25c6984f6cecd Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-on: http://openocd.zylin.com/1639 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-19 15:59:09 -05:00
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME
AT91SAM4L: handle reset run/halt in SMAP This is a remake of http://openocd.zylin.com/1966 originally written by Angus Gratton <gus@projectgus.com> ATSAM4L has a "System Manager Access Port" (SMAP) that holds the CPU in reset if TCK is low when srst (RESET_N) is deasserted. Without this change any use of sysresetreq or srst locks the chip in reset state until power is cycled. A new function smap_reset_deassert is called as reset-deassert-post event handler. It optionally prepares reset vector catch and SMAP reset is released then. Change-Id: Iad736357b0f551725befa2b9e00f3bc54504f3d8 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2604 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-03-14 06:03:47 -05:00
# SAM4L SMAP will hold the CPU in reset if TCK is low when RESET_N
# deasserts (see datasheet 42023E-SAM-07/2013 sec 8.11.3).
#
# smap_reset_deassert configures whether we want to run or halt out of reset,
# then instruct the SMAP to let us out of reset.
$_TARGETNAME configure -event reset-deassert-post "at91sam4l smap_reset_deassert"
# SRST (wired to RESET_N) resets debug circuitry
# srst_pulls_trst is not configured here to avoid an error raised in reset halt
reset_config srst_gates_jtag
# SAM4L starts from POR with SYSCLK set to 115kHz RCSYS, needs slow JTAG speed.
# Datasheet does not specify SYSCLK to JTAG/SWD clock ratio.
# Usually used SYSCLK/6 is hell slow, testing shows that debugging can work @ SYSCLK/2
# but your mileage may vary.
adapter_khz 50
# System RC oscillator RCSYS starts in 3 cycles
adapter_nsrst_delay 0