56 lines
1.3 KiB
INI
56 lines
1.3 KiB
INI
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# MKL25Z128VLK4
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# FreeScale Cortex-M0plus with 128kB Flash and 16kB Local On-Chip SRAM
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if { [info exists CHIPNAME] == 0 } {
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set _CHIPNAME kl25z
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}
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if { [info exists CPUTAPID] == 0 } {
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set _CPUTAPID 0x0BC11477
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}
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if { [info exists WORKAREASIZE] == 0 } {
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set _WORKAREASIZE 0x3000
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}
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if { [info exists TRANSPORT] == 0 } {
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set _TRANSPORT hla_swd
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}
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transport select $_TRANSPORT
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hla newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME hla_target -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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flash bank pflash kinetis 0x00000000 0x20000 0 4 $_TARGETNAME
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proc kl25z_enable_pll {} {
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echo "KL25Z: Enabling PLL"
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# SIM->CLKDIV1 = (uint32_t)0x00020000UL; /* Update system prescalers */
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mww 0x40048044 0x00020000
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# /* Switch to FEI Mode */
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# MCG->C1 = (uint8_t)0x06U;
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mwb 0x40064000 0x06
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# MCG->C2 = (uint8_t)0x00U;
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mwb 0x40064001 0x00
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# /* MCG->C4: DMX32=0,DRST_DRS=1 */
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# MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0U) | (uint8_t)0x20U);
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mwb 0x40064003 0x37
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#OSC0->CR = (uint8_t)0x80U;
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mwb 0x40065000 0x80
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# MCG->C5 = (uint8_t)0x00U;
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mwb 0x40064004 0x00
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# MCG->C6 = (uint8_t)0x00U;
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mwb 0x40064005 0x00
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sleep 100
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}
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$_TARGETNAME configure -event reset-init {
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kl25z_enable_pll
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}
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