73 lines
2.2 KiB
ArmAsm
73 lines
2.2 KiB
ArmAsm
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/***************************************************************************
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* Copyright (C) 2011 by Andreas Fritiofson *
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* andreas.fritiofson@gmail.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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***************************************************************************/
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.text
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.syntax unified
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.cpu cortex-m0
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.thumb
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/* Params:
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* r0 - flash base (in), status (out)
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* r1 - count (halfword-16bit)
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* r2 - workarea start
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* r3 - workarea end
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* r4 - target address
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* Clobbered:
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* r5 - rp
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* r6 - wp, tmp
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* r7 - tmp
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*/
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#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
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.thumb_func
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.global _start
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_start:
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wait_fifo:
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ldr r6, [r2, #0] /* read wp */
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cmp r6, #0 /* abort if wp == 0 */
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beq exit
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ldr r5, [r2, #4] /* read rp */
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cmp r5, r6 /* wait until rp != wp */
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beq wait_fifo
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ldrh r6, [r5] /* "*target_address++ = *rp++" */
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strh r6, [r4]
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adds r5, #2
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adds r4, #2
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busy:
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ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */
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movs r7, #1
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tst r6, r7
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bne busy
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movs r7, #0x14 /* check the error bits */
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tst r6, r7
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bne error
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cmp r5, r3 /* wrap rp at end of buffer */
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bcc no_wrap
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mov r5, r2
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adds r5, #8
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no_wrap:
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str r5, [r2, #4] /* store rp */
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subs r1, r1, #1 /* decrement halfword count */
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cmp r1, #0
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beq exit /* loop if not done */
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b wait_fifo
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error:
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movs r0, #0
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str r0, [r2, #4] /* set rp = 0 on error */
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exit:
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mov r0, r6 /* return status in r0 */
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bkpt #0
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