2022-06-12 16:42:27 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2019-04-04 08:19:55 -05:00
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#
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# Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx6ul
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}
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# CoreSight Debug Access Port
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
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-expected-id $_DAP_TAPID
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# SDMA / no IDCODE
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jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
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# System JTAG Controller
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set _SJC_TAPID_6UL 0x0891d01d
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set _SJC_TAPID_6ULL 0x0891e01d
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set _SJC_TAPID_6ULZ 0x1891e01d
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# Allow external override of the first SJC TAPID
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if { [info exists SJC_TAPID] } {
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set _SJC_TAPID $SJC_TAPID
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} else {
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set _SJC_TAPID $_SJC_TAPID_6UL
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}
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jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
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-ignore-version \
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-expected-id $_SJC_TAPID \
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-expected-id $_SJC_TAPID_6ULL \
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-expected-id $_SJC_TAPID_6ULZ \
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# Create DAP
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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# Main AHB bus
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target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
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# Cortex-A7 single core
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -dbgbase 0x82130000
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