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riscv-openocd/src/pld/virtex2.h

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openocd: src: replace the GPL-2.0-or-later license tag Replace the FSF boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I30cd66ac7d737f1973c68fdbb841ffcf00e917c4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7072 Tested-by: jenkins
2022-06-26 18:26:22 -05:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-11-22 07:03:10 -06:00
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
***************************************************************************/
build: cleanup src/pld directory Change-Id: I9edb027c76e5d7fe21d557a11e6a9691fa581e86 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/408 Tested-by: jenkins
2012-01-27 10:45:29 -06:00
Make #include guard naming consistent Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2956 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-09-21 14:07:46 -05:00
#ifndef OPENOCD_PLD_VIRTEX2_H
#define OPENOCD_PLD_VIRTEX2_H
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-11-22 07:03:10 -06:00
change #include "jtag.h" to <jtag/jtag.h> Changes from the flat namespace to heirarchical one. Instead of writing: #include "jtag.h" the following form should be used. #include <jtag/jtag.h> The exception is from .c files in the same directory.
2009-12-03 06:14:31 -06:00
#include <jtag/jtag.h>
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-11-22 07:03:10 -06:00
build: cleanup src/pld directory Change-Id: I9edb027c76e5d7fe21d557a11e6a9691fa581e86 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/408 Tested-by: jenkins
2012-01-27 10:45:29 -06:00
struct virtex2_pld_device {
struct jtag_tap *tap;
cpld/virtex2: allow JSTART to be disabled This adds an option to disable the use of the JSTART instruction when loading bitstreams to xilinx fpgas. JSTART apparently prevents configuration if the startup clock is not set to the jtag clock in the bitstream. xc3sprog is omitting JSTART for all devices. Problems with loading a bitstream that does not have StartupClk:JTAGClk are described here: http://www.xilinx.com/support/answers/56151.html Change-Id: I8137c0bae05a8c3c6f8e2611869f70a770d1651d Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2860 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-07-03 00:15:53 -05:00
int no_jstart;
virtex2_pld_device_t -> struct virtex2_pld_device Remove misleading typedef and redundant suffix from struct virtex2_pld_device.
2009-11-13 10:14:57 -06:00
};
- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-11-22 07:03:10 -06:00
Make #include guard naming consistent Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2956 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-09-21 14:07:46 -05:00
#endif /* OPENOCD_PLD_VIRTEX2_H */