riscv-openocd/tcl/target/stm32w108xx.cfg

# SPDX-License-Identifier: GPL-2.0-or-later

#
# Target configuration for the ST STM32W108xx chips
#
# Processor: ARM Cortex-M3
# Date:      2013-06-09
# Author:    Giuseppe Barba <giuseppe.barba@gmail.com>

#
# stm32 devices support both JTAG and SWD transports.
#
source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] == 0 } {
   set _CHIPNAME stm32w108
} else {
   set _CHIPNAME $CHIPNAME
}

# Work-area is a space in RAM used for flash programming
# By default use 8kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x2000
}

if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   if { [using_jtag] } {
      set _CPUTAPID 0x3ba00477
   } {
      set _CPUTAPID 0x1ba01477
   }
}

set _ENDIAN little

swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

if {[using_jtag]} {
 if { [info exists BSTAPID] } {
   set _BSTAPID $BSTAPID
   jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf -expected-id _BSTAPID
 } else {
   set _BSTAPID_1 0x169a862b
   set _BSTAPID_2 0x269a862b
   jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0xe -irmask 0xf \
		-expected-id $_BSTAPID_1 -expected-id $_BSTAPID_2
 }
}
#
# Set Target
#
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0


# Use the flash driver from the EM357
set _FLASHNAME $_CHIPNAME.flash

# 64k (0x10000) of flash
flash bank $_FLASHNAME em357 0x08000000 0x10000 0 0 $_TARGETNAME

reset_config srst_nogate

if {![using_hla]} {
   cortex_m reset_config sysresetreq
}