2022-06-12 16:42:27 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2009-09-21 13:48:22 -05:00
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if { [info exists CHIPNAME] } {
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2011-10-29 16:32:17 -05:00
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set _CHIPNAME $CHIPNAME
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2009-09-21 13:48:22 -05:00
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} else {
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2011-10-29 16:32:17 -05:00
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set _CHIPNAME cs351x
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2009-06-30 15:44:21 -05:00
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}
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2009-09-21 13:48:22 -05:00
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if { [info exists ENDIAN] } {
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2011-10-29 16:32:17 -05:00
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set _ENDIAN $ENDIAN
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2009-09-21 13:48:22 -05:00
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} else {
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2011-10-29 16:32:17 -05:00
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set _ENDIAN little
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2009-06-30 15:44:21 -05:00
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}
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2011-10-29 16:32:17 -05:00
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if { [info exists CPUTAPID] } {
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2009-06-30 15:44:21 -05:00
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x00526fa1
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}
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2011-10-29 16:32:17 -05:00
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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2009-06-30 15:44:21 -05:00
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# Create the GDB Target.
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2009-09-04 00:17:03 -05:00
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set _TARGETNAME $_CHIPNAME.cpu
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2014-09-08 15:11:02 -05:00
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target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME
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2009-09-04 00:17:03 -05:00
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2009-06-30 15:44:21 -05:00
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# There is 16K of SRAM on this chip
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# FIXME: flash programming is not working by using this work area. So comment this out for now.
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2011-10-29 16:32:17 -05:00
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#$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
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2009-06-30 15:44:21 -05:00
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# This chip has a DCC ... use it
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arm7_9 dcc_downloads enable
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