473 lines
13 KiB
C
473 lines
13 KiB
C
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/******************************************************************************
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*
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "driverlib.h"
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/*
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* Wrapper function for the CPSID instruction.
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* Returns the state of PRIMASK on entry.
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*/
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uint32_t __attribute__((naked)) cpu_cpsid(void)
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{
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uint32_t ret;
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/* Read PRIMASK and disable interrupts. */
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__asm(" mrs r0, PRIMASK\n"
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" cpsid i\n"
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" bx lr\n"
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: "=r" (ret));
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/*
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* The return is handled in the inline assembly, but the compiler will
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* still complain if there is not an explicit return here (despite the fact
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* that this does not result in any code being produced because of the
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* naked attribute).
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*/
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return ret;
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}
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/* Wrapper function for the CPUWFI instruction. */
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void __attribute__((naked)) cpu_wfi(void)
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{
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/* Wait for the next interrupt. */
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__asm(" wfi\n"
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" bx lr\n");
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}
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/* Power Control Module APIs */
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#if defined(PCM)
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static bool __pcm_set_core_voltage_level_advanced(uint_fast8_t voltage_level,
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uint32_t time_out, bool blocking)
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{
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uint8_t power_mode;
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uint8_t current_voltage_level;
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uint32_t reg_value;
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bool bool_timeout;
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/* Getting current power mode and level */
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power_mode = pcm_get_power_mode();
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current_voltage_level = pcm_get_core_voltage_level();
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bool_timeout = time_out > 0 ? true : false;
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/* If we are already at the power mode they requested, return */
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if (current_voltage_level == voltage_level)
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return true;
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while (current_voltage_level != voltage_level) {
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reg_value = PCM->CTL0;
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switch (pcm_get_power_state()) {
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case PCM_AM_LF_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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case PCM_AM_LDO_VCORE0:
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PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE1)
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LF_VCORE0:
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LDO_VCORE1:
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PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE0)
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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default:
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break;
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}
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if (blocking) {
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while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
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if (bool_timeout && !(--time_out))
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return false;
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}
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} else
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return true;
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current_voltage_level = pcm_get_core_voltage_level();
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}
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/* Changing the power mode if we are stuck in LDO mode */
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if (power_mode != pcm_get_power_mode()) {
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if (power_mode == PCM_DCDC_MODE)
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return pcm_set_power_mode(PCM_DCDC_MODE);
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else
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return pcm_set_power_mode(PCM_LF_MODE);
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}
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return true;
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}
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bool pcm_set_core_voltage_level(uint_fast8_t voltage_level)
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{
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return __pcm_set_core_voltage_level_advanced(voltage_level, 0, true);
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}
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uint8_t pcm_get_power_mode(void)
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{
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uint8_t current_power_state;
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current_power_state = pcm_get_power_state();
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switch (current_power_state) {
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case PCM_AM_LDO_VCORE0:
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case PCM_AM_LDO_VCORE1:
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case PCM_LPM0_LDO_VCORE0:
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case PCM_LPM0_LDO_VCORE1:
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default:
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return PCM_LDO_MODE;
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_DCDC_VCORE1:
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case PCM_LPM0_DCDC_VCORE0:
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case PCM_LPM0_DCDC_VCORE1:
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return PCM_DCDC_MODE;
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case PCM_LPM0_LF_VCORE0:
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case PCM_LPM0_LF_VCORE1:
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case PCM_AM_LF_VCORE1:
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case PCM_AM_LF_VCORE0:
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return PCM_LF_MODE;
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}
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}
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uint8_t pcm_get_core_voltage_level(void)
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{
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uint8_t current_power_state = pcm_get_power_state();
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switch (current_power_state) {
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case PCM_AM_LDO_VCORE0:
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LF_VCORE0:
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case PCM_LPM0_LDO_VCORE0:
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case PCM_LPM0_DCDC_VCORE0:
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case PCM_LPM0_LF_VCORE0:
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default:
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return PCM_VCORE0;
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case PCM_AM_LDO_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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case PCM_AM_LF_VCORE1:
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case PCM_LPM0_LDO_VCORE1:
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case PCM_LPM0_DCDC_VCORE1:
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case PCM_LPM0_LF_VCORE1:
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return PCM_VCORE1;
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case PCM_LPM3:
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return PCM_VCORELPM3;
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}
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}
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static bool __pcm_set_power_mode_advanced(uint_fast8_t power_mode,
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uint32_t time_out, bool blocking)
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{
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uint8_t current_power_mode;
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uint8_t current_power_state;
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uint32_t reg_value;
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bool bool_timeout;
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/* Getting Current Power Mode */
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current_power_mode = pcm_get_power_mode();
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/* If the power mode being set it the same as the current mode, return */
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if (power_mode == current_power_mode)
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return true;
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current_power_state = pcm_get_power_state();
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bool_timeout = time_out > 0 ? true : false;
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/* Go through the while loop while we haven't achieved the power mode */
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while (current_power_mode != power_mode) {
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reg_value = PCM->CTL0;
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switch (current_power_state) {
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LF_VCORE0:
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PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LF_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LDO_VCORE1: {
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if (power_mode == PCM_DCDC_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else if (power_mode == PCM_LF_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else
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return false;
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break;
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}
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case PCM_AM_LDO_VCORE0: {
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if (power_mode == PCM_DCDC_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else if (power_mode == PCM_LF_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else
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return false;
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break;
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}
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default:
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break;
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}
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if (blocking) {
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while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
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if (bool_timeout && !(--time_out))
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return false;
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}
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} else
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return true;
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current_power_mode = pcm_get_power_mode();
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current_power_state = pcm_get_power_state();
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}
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return true;
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}
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bool pcm_set_power_mode(uint_fast8_t power_mode)
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{
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return __pcm_set_power_mode_advanced(power_mode, 0, true);
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}
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static bool __pcm_set_power_state_advanced(uint_fast8_t power_state,
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uint32_t timeout, bool blocking)
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{
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uint8_t current_power_state;
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current_power_state = pcm_get_power_state();
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if (current_power_state == power_state)
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return true;
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switch (power_state) {
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case PCM_AM_LDO_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking);
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case PCM_AM_LDO_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking);
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case PCM_AM_DCDC_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking);
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case PCM_AM_DCDC_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking);
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case PCM_AM_LF_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking);
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case PCM_AM_LF_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking);
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case PCM_LPM0_LDO_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LDO_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_DCDC_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_DCDC_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LF_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LF_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM3:
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return pcm_goto_lpm3();
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case PCM_LPM4:
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return pcm_goto_lpm4();
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case PCM_LPM45:
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return pcm_shutdown_device(PCM_LPM45);
|
||
|
|
case PCM_LPM35_VCORE0:
|
||
|
|
return pcm_shutdown_device(PCM_LPM35_VCORE0);
|
||
|
|
default:
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool pcm_set_power_state(uint_fast8_t power_state)
|
||
|
|
{
|
||
|
|
return __pcm_set_power_state_advanced(power_state, 0, true);
|
||
|
|
}
|
||
|
|
|
||
|
|
bool pcm_shutdown_device(uint32_t shutdown_mode)
|
||
|
|
{
|
||
|
|
uint32_t shutdown_mode_bits = (shutdown_mode == PCM_LPM45) ?
|
||
|
|
PCM_CTL0_LPMR_12 : PCM_CTL0_LPMR_10;
|
||
|
|
|
||
|
|
/* If a power transition is occuring, return false */
|
||
|
|
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
|
||
|
|
return false;
|
||
|
|
|
||
|
|
/* Initiating the shutdown */
|
||
|
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
|
||
|
|
|
||
|
|
PCM->CTL0 = (PCM_KEY | shutdown_mode_bits
|
||
|
|
| (PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)));
|
||
|
|
|
||
|
|
cpu_wfi();
|
||
|
|
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool pcm_goto_lpm4(void)
|
||
|
|
{
|
||
|
|
/* Disabling RTC_C and WDT_A */
|
||
|
|
wdt_a_hold_timer();
|
||
|
|
rtc_c_hold_clock();
|
||
|
|
|
||
|
|
/* LPM4 is just LPM3 with WDT_A/RTC_C disabled... */
|
||
|
|
return pcm_goto_lpm3();
|
||
|
|
}
|
||
|
|
|
||
|
|
bool pcm_goto_lpm0(void)
|
||
|
|
{
|
||
|
|
/* If we are in the middle of a state transition, return false */
|
||
|
|
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
|
||
|
|
return false;
|
||
|
|
|
||
|
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
|
||
|
|
|
||
|
|
cpu_wfi();
|
||
|
|
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool pcm_goto_lpm3(void)
|
||
|
|
{
|
||
|
|
uint_fast8_t current_power_state;
|
||
|
|
uint_fast8_t current_power_mode;
|
||
|
|
|
||
|
|
/* If we are in the middle of a state transition, return false */
|
||
|
|
if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
|
||
|
|
return false;
|
||
|
|
|
||
|
|
/* If we are in the middle of a shutdown, return false */
|
||
|
|
if ((PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_10
|
||
|
|
|| (PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_12)
|
||
|
|
return false;
|
||
|
|
|
||
|
|
current_power_mode = pcm_get_power_mode();
|
||
|
|
current_power_state = pcm_get_power_state();
|
||
|
|
|
||
|
|
if (current_power_mode == PCM_DCDC_MODE)
|
||
|
|
pcm_set_power_mode(PCM_LDO_MODE);
|
||
|
|
|
||
|
|
/* Clearing the SDR */
|
||
|
|
PCM->CTL0 =
|
||
|
|
(PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)) | PCM_KEY;
|
||
|
|
|
||
|
|
/* Setting the sleep deep bit */
|
||
|
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
|
||
|
|
|
||
|
|
cpu_wfi();
|
||
|
|
|
||
|
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
|
||
|
|
|
||
|
|
return pcm_set_power_state(current_power_state);
|
||
|
|
}
|
||
|
|
|
||
|
|
uint8_t pcm_get_power_state(void)
|
||
|
|
{
|
||
|
|
return (PCM->CTL0 & PCM_CTL0_CPM_MASK) >> PCM_CTL0_CPM_OFS;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Real Time Clock APIs */
|
||
|
|
#if defined(RTC_C)
|
||
|
|
|
||
|
|
void rtc_c_hold_clock(void)
|
||
|
|
{
|
||
|
|
RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY;
|
||
|
|
BITBAND_PERI(RTC_C->CTL13, RTC_C_CTL13_HOLD_OFS) = 1;
|
||
|
|
BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Watch Dog Timer APIs */
|
||
|
|
#if defined(WDT_A)
|
||
|
|
|
||
|
|
void wdt_a_hold_timer(void)
|
||
|
|
{
|
||
|
|
/* Set Hold bit */
|
||
|
|
uint8_t new_wdt_status = (WDT_A->CTL | WDT_A_CTL_HOLD);
|
||
|
|
|
||
|
|
WDT_A->CTL = WDT_A_CTL_PW + new_wdt_status;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|