riscv-openocd/tcl/target/xba_revA3.cfg

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#Written by: Michael Schwingen <rincewind@discworld.dascon.de>
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME xba_reva3
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# default to big endian
set _ENDIAN big
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0xffffffff
}
reset_config trst_and_srst separate
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
$_TARGETNAME configure -event reset-init {
#############################################################################
# setup expansion bus CS, disable external wdt
#############################################################################
mww 0xc4000000 0xbd113842 #CS0 : Flash, write enabled @0x50000000
mww 0xc4000004 0x94d10013 #CS1
mww 0xc4000008 0x95960003 #CS2
mww 0xc400000c 0x00000000 #CS3
mww 0xc4000010 0x80900003 #CS4
mww 0xc4000014 0x9d520003 #CS5
mww 0xc4000018 0x81860001 #CS6
mww 0xc400001c 0x80900003 #CS7
#############################################################################
# init SDRAM controller: 16MB, one bank, CL3
#############################################################################
mww 0xCC000000 0x2A # SDRAM_CFG: 64MBit, CL3
mww 0xCC000004 0 # disable refresh
mww 0xCC000008 3 # NOP
sleep 100
mww 0xCC000004 2100 # set refresh counter
mww 0xCC000008 2 # Precharge All Banks
sleep 100
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 4 # Auto Refresh
mww 0xCC000008 1 # Mode Select CL3
#mww 0xc4000020 0xffffee # CFG0: remove expansion bus boot flash
#mirror at 0x00000000
#big endian
reg XSCALE_CTRL 0xF8
#
# detect flash
#
flash probe 0
}
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0
flash bank cfi 0x50000000 0x400000 2 2 0
init
reset init
# set big endian mode
reg XSCALE_CTRL 0xF8