2022-06-12 16:42:27 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2009-09-25 11:48:15 -05:00
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######################################
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2011-07-18 02:20:31 -05:00
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# Target: Toshiba TMPA900
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2009-09-25 11:48:15 -05:00
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######################################
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2009-09-30 18:02:15 -05:00
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if { [info exists CHIPNAME] } {
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2011-10-29 16:32:17 -05:00
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set _CHIPNAME $CHIPNAME
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2009-09-30 18:02:15 -05:00
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} else {
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2011-10-29 16:32:17 -05:00
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set _CHIPNAME tmpa900
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2009-09-25 11:48:15 -05:00
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}
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2011-10-18 18:54:25 -05:00
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# Toshiba TMPA900 series MCUs are always little endian as per datasheet.
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set _ENDIAN little
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2009-09-25 11:48:15 -05:00
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2011-10-29 16:32:17 -05:00
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if { [info exists CPUTAPID] } {
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2009-09-25 11:48:15 -05:00
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x07926031
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}
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2011-07-18 02:20:31 -05:00
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#TMPA900 has following IDs:
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2009-09-25 11:48:15 -05:00
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# CP15.0 register 0x41069265
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# CP15.1 register 0x1d152152
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# ARM core 0x07926031
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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2019-08-23 08:51:00 -05:00
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adapter srst delay 20
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2009-09-25 11:48:15 -05:00
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jtag_ntrst_delay 20
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######################
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# Target configuration
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######################
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2009-12-15 16:39:25 -06:00
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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2009-09-25 11:48:15 -05:00
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2011-10-18 18:09:44 -05:00
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# Internal RAM-0 (16kB): 0xf8004000
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# Internal RAM-1 (8kB): 0xf8008000
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# Use internal RAM-0 and RAM-1 as working area (24kB total).
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$_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0x6000 \
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2009-09-25 11:48:15 -05:00
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-work-area-backup 0
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