2022-06-12 16:48:05 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2015-06-17 13:57:34 -05:00
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source [find target/atheros_ar2313.cfg]
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reset_config trst_and_srst
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$_TARGETNAME configure -event reset-init {
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mips32 cp0 12 0 0x10400000
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# configure sdram controller
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mww 0xb8300004 0x0e03
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sleep 100
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mww 0xb8300004 0x0e01
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mww 0xb8300008 0x10
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sleep 500
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mww 0xb8300004 0x0e02
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mww 0xb8300000 0x6c0088
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mww 0xb8300008 0x57e
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mww 0xb8300004 0x0e00
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mww 0xb8300004 0xb00
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# configure flash
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# 0x00000001 - 0x01 << FLASHCTL_IDCY_S
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# 0x000000e0 - 0x07 << FLASHCTL_WST1_S
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# FLASHCTL_RBLE 0x00000400 - Read byte lane enable
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# 0x00003800 - 0x07 << FLASHCTL_WST2_S
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# FLASHCTL_AC_8M 0x00060000 - Size of flash
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# FLASHCTL_E 0x00080000 - Flash bank enable (added)
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# FLASHCTL_WP 0x04000000 - write protect. If used, CFI mode wont work!!
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# FLASHCTL_MWx16 0x10000000 - 16bit mode. Do not use it!!
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# FLASHCTL_MWx8 0x00000000 - 8bit mode.
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mww 0xb8400000 0x000d3ce1
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}
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0xbe000000 0x00400000 1 1 $_TARGETNAME x16_as_x8
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