riscv-openocd/tcl/fpga/altera-cycloneiv.cfg

# SPDX-License-Identifier: GPL-2.0-or-later

# Intel Cyclone IV FPGA
# see Cyclone IV Device Handbook
# Table 10-2: IDCODE Information for 32-Bit Cyclone IV Devices

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME cycloneiv
}

array set _CYCLON_4_DATA {
  0x020f10dd { 603  226 EP4CE6_EP4CE10}
  0x020f20dd {1080  409 EP4CE15}
  0x020f30dd { 732  286 EP4CE22}
  0x020f40dd {1632  604 EP4CE30_EP4CE40}
  0x020f50dd {1164  442 EP4CE55}
  0x020f60dd {1314  502 EP4CE75}
  0x020f70dd {1620  613 EP4CE115}
  0x028010dd { 260  229 EP4CGX15}
  0x028120dd { 494  463 EP4CGX22}
  0x028020dd { 494  463 EP4CGX30}
  0x028230dd {1006  943 EP4CGX30}
  0x028130dd {1006  943 EP4CGX50}
  0x028030dd {1006  943 EP4CGX75}
  0x028140dd {1495 1438 EP4CGX110}
  0x028040dd {1495 1438 EP4CGX150}
}

set jtag_newtap_cmd {jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version}
foreach id [array names _CYCLON_4_DATA] {
  set cmd [concat "-expected-id" id]
}
eval $jtag_newtap_cmd

source [find fpga/altera_common_init.cfg]

pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiv
jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME {$_CYCLONE_4_DATA}"