51 lines
1.2 KiB
INI
51 lines
1.2 KiB
INI
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# Hitex stm32 performance stick
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32_hitex
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# set jtag speed
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jtag_khz 500
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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#jtag scan chain
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# The CPU
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# See STM Document RM0008
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# Section 26.6.3
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set _CPUTAPID 0x3ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# The boundery scan register, leave the "expected-id" undefined.
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jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1
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# configure str750 connected to jtag chain
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jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0x0f
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
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#
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flash bank stm32x 0 0 0 0 0
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# For more information about the configuration files, take a look at:
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# openocd.texi
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