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riscv-openocd/tcl/board/kc705.cfg

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kc705: digilent-jtag/kintex7/jtagspi board Xilinx Kintex7 Development board with integrated Digilent JTAG-SMT1 (a.k.a. HS1) interface and a 128 MBit SPI flash. Change-Id: I9daba0a2fb2c17e04bcb37bd41872ebde25e0d2f Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2861 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-07-03 00:38:53 -05:00
# http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html
source [find interface/ftdi/digilent-hs1.cfg]
source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]
tcl/fpga/xilinx-xadc.cfg: add support for XADC The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die temperature, internal power supply rail voltages as well as external voltages. The XADC is available both from fabric as well as through the JTAG TAP. This code implements access throught the JTAG TAP. https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf Change-Id: I6cef4d0244add71749fa28b58a736302151cc4dd Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4395 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-29 14:12:37 -06:00
source [find fpga/xilinx-xadc.cfg]
xilinx-dna.cfg: generic tools for reading Xilinx Device DNA Most Xilinx FPGA devices contain an embedded, unique device identifier. The identifier is nonvolatile, permanently programmed into the FPGA, and is unchangeable providing a great serial / tracking number. This commit adds generic support for reading the Xilinx Spartan 6 and 7 Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register addresses are different and the logic has been simplified. The code was not placed in xilinx-xc7.cfg. The approach of defining taps in the same file as library code to use them is fundamentally broken on boards that have more than one FPGA or other chips. This commit (like the addition of support for Xilinx XADC) starts to remedy that by splitting library code from board-specific fixed definitions. The support code is sourced in the Kasli and KC705 board support files as it was tested on these boards. Change-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4396 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-05 05:54:29 -06:00
source [find fpga/xilinx-dna.cfg]
kc705: digilent-jtag/kintex7/jtagspi board Xilinx Kintex7 Development board with integrated Digilent JTAG-SMT1 (a.k.a. HS1) interface and a 128 MBit SPI flash. Change-Id: I9daba0a2fb2c17e04bcb37bd41872ebde25e0d2f Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2861 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-07-03 00:38:53 -05:00
adapter_khz 25000
# example command to write bitstream, soft-cpu bios and runtime:
# openocd -f board/kc705.cfg -c "init;\
# jtagspi_init 0 bscan_spi_xc7k325t.bit;\
# jtagspi_program bitstream-kc705.bin 0;\
# jtagspi_program bios.bin 0xaf0000;\
# jtagspi_program runtime.fbi 0xb00000;\
# xc7_program xc7.tap;\
# exit"