2022-06-12 16:51:51 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2017-08-03 05:25:07 -05:00
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# Xilinx Ultrascale (Kintex, Virtex, Zynq)
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# https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME xcu
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}
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2022-11-05 04:59:43 -05:00
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# The various chips in the Ultrascale family have different IR length.
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2017-08-03 05:25:07 -05:00
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# Set $CHIP before including this file to determine the device.
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array set _XCU_DATA {
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2023-04-14 18:13:12 -05:00
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XCKU025 {0x03824093 6}
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XCKU035 {0x03823093 6}
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XCKU040 {0x03822093 6}
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XCKU060 {0x03919093 6}
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XCKU060_CIV {0x0381b093 6}
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XCKU095 {0x03844093 6}
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XCKU095_CIV {0x03845093 6}
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XCKU3P {0x04A63093 6}
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XCKU5P {0x04A62093 6}
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XCKU9P {0x0484A093 6}
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XCKU11P {0x04A4E093 6}
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XCKU11P_CIV {0x04A51093 6}
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XCKU13P {0x04A52093 6}
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XCKU15P {0x04A56093 6}
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XCKU15P_CIV {0x04A59093 6}
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XCVU065 {0x03939093 6}
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XCVU065_CIV {0x0393b093 6}
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XCVU080 {0x03843093 6}
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XCVU080_CIV {0x03845093 6}
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XCVU095 {0x03842093 6}
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XCVU2P {0x04aea093 6}
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XCVU3P {0x04B39093 6}
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XCVU3P_CIV {0x04b3d093 6}
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XCAU10P {0x04AC4033 6}
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XCAU10P_FFVB676 {0x04AC4093 6}
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XCAU15P {0x04AC2033 6}
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XCAU15P_FFVB676 {0x04AC2093 6}
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XCAU20P {0x04A65093 6}
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XCAU25P {0x04A64093 6}
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XCKU5P_CIV {0x04A64093 6}
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XCKU19P {0x04ACF093 6}
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XCKU19P_CIV {0x04AD3093 6}
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XCKU085 {0x0380F093 12}
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XCKU115 {0x0390D093 12}
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XCVU125 {0x0392D093 12}
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XCVU125_CIV {0x0392f093 12}
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XCVU5P {0x04B2B093 12}
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XCVU5P_CIV {0x04b2f093 12}
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XCVU7P {0x04B29093 12}
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XCVU7P_CIV {0x04b2d093 12}
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XCVU160 {0x03933093 18}
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XCVU190 {0x03931093 18}
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XCVU440 {0x0396D093 18}
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XCVU440_CIV {0x0396f093 18}
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XCVU9P {0x04B31093 18}
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XCVU9P_CIV {0x04b35093 18}
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XCVU11P {0x04B49093 18}
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XCVU11P_CIV {0x04b4f093 18}
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XCU200_FSGD2104 {0x04b37093 18}
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XCU250 {0x04b57093 24}
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XCVU13P {0x04B51093 24}
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XCVU13P_CIV {0x04b55093 24}
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XCVU15P {0x04ba3093 24}
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XCVU19P {0x04ba1093 24}
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XCVU19P_CIV {0x04ba5093 24}
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2017-08-03 05:25:07 -05:00
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}
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if { ![info exists CHIP] } {
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error "set CHIP to one of "[concat [array names _XCU_DATA]]
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}
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if { ![llength [array names _XCU_DATA $CHIP]] } {
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error "unknown CHIP: "$CHIP
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}
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set _EXPID [lindex $_XCU_DATA($CHIP) 0]
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set _IRLEN [lindex $_XCU_DATA($CHIP) 1]
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# the 4 top bits (28:31) are the die stepping/revisions. ignore it.
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jtag newtap $_CHIPNAME tap -irlen $_IRLEN -ignore-version -expected-id $_EXPID
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2023-06-03 13:16:19 -05:00
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pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
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2017-08-03 05:25:07 -05:00
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2023-04-14 18:13:12 -05:00
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# set the correct instruction codes for jtag hub and
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# at least the right code for jprogb, jstart and jshutdown for SSI devices
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if { $_IRLEN == 6 } {
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virtex2 set_user_codes $_CHIPNAME.pld 0x2 0x3 0x22 0x23
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} elseif {$_IRLEN == 12 } {
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puts "loading bitstream through jtag will not work, but reprogram (refresh)"
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virtex2 set_instr_codes $_CHIPNAME.pld 0x905 0x904 0x2cb 0x30c 0x34d
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virtex2 set_user_codes $_CHIPNAME.pld 0x0a4 0x0e4 0x8a4 0x8e4
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} elseif {$_IRLEN == 18 } {
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puts "loading bitstream through jtag will not work, but reprogram (refresh)"
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virtex2 set_instr_codes $_CHIPNAME.pld 0x24905 0x24904 0x0b2cb 0x0c30c 0x0d34d
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virtex2 set_user_codes $_CHIPNAME.pld 0x000a4 0x000e4 0x008a4 0x008e4
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} else {
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puts "loading bitstream through jtag will not work, but reprogram (refresh)"
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virtex2 set_instr_codes $_CHIPNAME.pld 0x924905 0x924904 0x2cb2cb 0x30c30c 0x34d34d
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virtex2 set_user_codes $_CHIPNAME.pld 0x0a4924 0x0e4924 0x8a4924 0x8e4924
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}
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2017-08-03 05:25:07 -05:00
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set XCU_JSHUTDOWN 0x0d
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set XCU_JPROGRAM 0x0b
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set XCU_JSTART 0x0c
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set XCU_BYPASS 0x3f
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proc xcu_program {tap} {
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2024-08-25 21:51:22 -05:00
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echo "DEPRECATED! use 'virtex2 refresh XXXX.pld' not 'xcu_program'"
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2017-08-03 05:25:07 -05:00
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global XCU_JSHUTDOWN XCU_JPROGRAM XCU_JSTART XCU_BYPASS
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irscan $tap $XCU_JSHUTDOWN
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irscan $tap $XCU_JPROGRAM
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runtest 60000
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#JSTART prevents this from working...
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#irscan $tap $XCU_JSTART
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runtest 2000
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irscan $tap $XCU_BYPASS
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runtest 2000
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}
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