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riscv-openocd/tcl/target/stm32l1x_dual_bank.cfg

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tcl/target: add SPDX tag For historical reasons, no license information was added to the tcl files. This makes trivial adding the SPDX tag through script: fgrep -rL SPDX tcl/ target| while read a;do \ sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n }' $a;done With no specific license information from the author, let's extend the OpenOCD project license GPL-2.0-or-later to the files. Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7027 Tested-by: jenkins
2022-06-12 16:42:27 -05:00
# SPDX-License-Identifier: GPL-2.0-or-later
stm32l: split l0/l1 support no jtag, different HSI settings L0 is cortex m0+, so different id codes, SWD only, different addresses for the clock speedup. It has no endian options, no boundary scan. Removed all L0 specific portions from L1 files, and renamed files to clarify their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only around for backwards compatibility with prior releases. Tested on STM32L053 Discovery and STM32L151 Discovery. Has _not_ been tested with jtag on L1. Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2405 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
2014-11-21 16:14:57 -06:00
source [find target/stm32l1.cfg]
Allow transports to override the selected target (hla configs unification) This should allow to share common configs for both regular access and high-level adapters. Use the newly-added functionality in stlink and icdi drivers, amend the configs accordingly. Runtime-tested with a TI tm4c123g board. Change-Id: Ibb88266a4ca25f06f6c073e916c963f017447bad Signed-off-by: Paul Fertser <fercerpav@gmail.com> [gus@projectgus.com: context-specific deprecation warnings] Signed-off-by: Angus Gratton <gus@projectgus.com> [andrew.smirnov@gmail.com: additional nrf51.cfg mods] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Reviewed-on: http://openocd.zylin.com/1664 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-28 05:23:15 -05:00
stm32l: split l0/l1 support no jtag, different HSI settings L0 is cortex m0+, so different id codes, SWD only, different addresses for the clock speedup. It has no endian options, no boundary scan. Removed all L0 specific portions from L1 files, and renamed files to clarify their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only around for backwards compatibility with prior releases. Tested on STM32L053 Discovery and STM32L151 Discovery. Has _not_ been tested with jtag on L1. Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2405 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
2014-11-21 16:14:57 -06:00
# The stm32l1x 384kb have a dual bank flash.
stm32: add support for the STM32Lx 384kb dual bank flash This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an image that was larger than 192Kb. That lead to openocd printing out two error messages like "Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx driver tried to write half pages which overlapped into the next flash bank. A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices). A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly. Change-Id: I69e25131983d88613be8606b438f98870c5f1e52 Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com> Reviewed-on: http://openocd.zylin.com/1125 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-24 06:49:08 -06:00
# Let's add a definition for the second bank here.
# Add the second flash bank.
set _FLASHNAME $_CHIPNAME.flash1
flash/nor/stm32lx: use 0 base to autodetect second bank location Change-Id: I3c296b3e276fcd4d92e4180fc0d2133eebfcc240 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2503 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-24 04:57:58 -06:00
flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME