riscv-openocd/tcl/target/swm050.cfg

# Synwit SWM050

source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME swm050
}
set _CHIPSERIES swm050

if { [info exists WORKAREASIZE] } {
	set _WORKAREASIZE $WORKAREASIZE
} else {
	set _WORKAREASIZE 0x400
}

if { [info exists CPUTAPID] } {
	set _CPUTAPID $CPUTAPID
} else {
	set _CPUTAPID 0x0bb11477
}

swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME swm050 0x0 0x2000 0 0 $_TARGETNAME

adapter speed 1000

$_TARGETNAME configure -event reset-init {
	# Stop the watchdog, just to be safe
	mww 0x40019000 0x00
	# Set clock divider value to 1
	mww 0x400F0000 0x01
	# Set system clock to 18Mhz
	mww 0x400F0008 0x00
}

# SWM050 (Cortex-M0 core) supports SYSRESETREQ
if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset
    cortex_m reset_config sysresetreq
}