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riscv / caravel

Verilog 0 0

magic yosys caravel picorv32 openroad openram sky130

Updated 2024-11-04 10:25:41 -06:00

riscv / skywater-pdk

Python 0 0

magic openroad openram asic eda pdk asic-library skywater

Updated 2024-10-28 04:51:43 -05:00